Change comment "bitwise inclusive OR" to "bitwise OR".

[mirror_edk2.git] / MdePkg / Include / Library / PciCf8Lib.h

diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h
index e1f7e888eb48bd8f1f452fb707494d8d37a0efb1..ddc7c27fc0db7141f689ef0886f0cb7962582c5e 100644 (file)
--- a/MdePkg/Include/Library/PciCf8Lib.h
+++ b/MdePkg/Include/Library/PciCf8Lib.h
@@ -5,7 +5,7 @@
   configuration cycles must be though I/O ports 0xCF8 and 0xCFC.  This library only allows \r
   access to PCI Segment #0.\r
 \r
-Copyright (c) 2006 - 2008, Intel Corporation\r
+Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
 All rights reserved. This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -39,6 +39,33 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
   (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
 \r
+/**\r
+  Registers a PCI device so PCI configuration registers may be accessed after \r
+  SetVirtualAddressMap().\r
+  \r
+  Registers the PCI device specified by Address so all the PCI configuration registers \r
+  associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
+  \r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  \r
+  @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function \r
+                                   after ExitBootServices().\r
+  @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
+                                   at runtime could not be mapped.\r
+  @retval RETURN_OUT_OF_RESOURCES  There are not enough resources available to\r
+                                   complete the registration.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PciCf8RegisterForRuntimeAccess (\r
+  IN UINTN  Address\r
+  );\r
+\r
 /**\r
   Reads an 8-bit PCI configuration register.\r
 \r