@return The encode PCI address.\r
\r
**/\r
-#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))\r
+#define PCI_EXPRESS_LIB_ADDRESS(Bus, Device, Function, Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))\r
\r
/**\r
Registers a PCI device so PCI configuration registers may be accessed after\r
UINT8\r
EFIAPI\r
PciExpressRead8 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressWrite8 (\r
- IN UINTN Address,\r
- IN UINT8 Value\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressOr8 (\r
- IN UINTN Address,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressAnd8 (\r
- IN UINTN Address,\r
- IN UINT8 AndData\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressAndThenOr8 (\r
- IN UINTN Address,\r
- IN UINT8 AndData,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressBitFieldRead8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressBitFieldWrite8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressBitFieldOr8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressBitFieldAnd8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
PciExpressBitFieldAndThenOr8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressRead16 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressWrite16 (\r
- IN UINTN Address,\r
- IN UINT16 Value\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressOr16 (\r
- IN UINTN Address,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressAnd16 (\r
- IN UINTN Address,\r
- IN UINT16 AndData\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressAndThenOr16 (\r
- IN UINTN Address,\r
- IN UINT16 AndData,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressBitFieldRead16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressBitFieldWrite16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressBitFieldOr16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressBitFieldAnd16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
);\r
\r
/**\r
UINT16\r
EFIAPI\r
PciExpressBitFieldAndThenOr16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressRead32 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressWrite32 (\r
- IN UINTN Address,\r
- IN UINT32 Value\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressOr32 (\r
- IN UINTN Address,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressAnd32 (\r
- IN UINTN Address,\r
- IN UINT32 AndData\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressAndThenOr32 (\r
- IN UINTN Address,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressBitFieldRead32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressBitFieldWrite32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressBitFieldOr32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressBitFieldAnd32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
);\r
\r
/**\r
UINT32\r
EFIAPI\r
PciExpressBitFieldAndThenOr32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
PciExpressReadBuffer (\r
- IN UINTN StartAddress,\r
- IN UINTN Size,\r
- OUT VOID *Buffer\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
PciExpressWriteBuffer (\r
- IN UINTN StartAddress,\r
- IN UINTN Size,\r
- IN VOID *Buffer\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
);\r
\r
#endif\r