UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" with PatchInstructionX86()

[mirror_edk2.git] / MdePkg / Include / Library / PciExpressLib.h

diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Library/PciExpressLib.h
index e312d575285783e73c5601998728559376fc5a86..6ce3fbc139a653292e4fd904d08766d3de209387 100644 (file)
--- a/MdePkg/Include/Library/PciExpressLib.h
+++ b/MdePkg/Include/Library/PciExpressLib.h
@@ -5,7 +5,7 @@
   configuration cycles must be through the 256 MB PCI Express MMIO window whose base address\r
   is defined by PcdPciExpressBaseAddress.\r
 \r
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -19,6 +19,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #ifndef __PCI_EXPRESS_LIB_H__\r
 #define __PCI_EXPRESS_LIB_H__\r
 \r
+#include <IndustryStandard/PciExpress21.h>\r
+\r
 /**\r
   Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
   address that can be passed to the PCI Library functions.\r
@@ -35,8 +37,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   @return The encode PCI address.\r
 \r
 **/\r
-#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
-  (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))\r
 \r
 /**\r
   Registers a PCI device so PCI configuration registers may be accessed after \r