#define EFI_PEI_MM_ACCESS_PPI_GUID \\r
{ 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}\r
\r
-typedef struct _EFI_PEI_MM_ACCESS_PPI EFI_PEI_MM_ACCESS_PPI;\r
+typedef struct _EFI_PEI_MM_ACCESS_PPI EFI_PEI_MM_ACCESS_PPI;\r
\r
/**\r
Opens the MMRAM area to be accessible by a PEIM.\r
/// memory controller would publish this PPI.\r
///\r
struct _EFI_PEI_MM_ACCESS_PPI {\r
- EFI_PEI_MM_OPEN Open;\r
- EFI_PEI_MM_CLOSE Close;\r
- EFI_PEI_MM_LOCK Lock;\r
- EFI_PEI_MM_CAPABILITIES GetCapabilities;\r
- BOOLEAN LockState;\r
- BOOLEAN OpenState;\r
+ EFI_PEI_MM_OPEN Open;\r
+ EFI_PEI_MM_CLOSE Close;\r
+ EFI_PEI_MM_LOCK Lock;\r
+ EFI_PEI_MM_CAPABILITIES GetCapabilities;\r
+ BOOLEAN LockState;\r
+ BOOLEAN OpenState;\r
};\r
\r
-extern EFI_GUID gEfiPeiMmAccessPpiGuid;\r
+extern EFI_GUID gEfiPeiMmAccessPpiGuid;\r
\r
#endif\r