add EFI IPSEC protocol and EFI IPSEC Config protocol definition.

[mirror_edk2.git] / MdePkg / Include / Protocol / PciPlatform.h

diff --git a/MdePkg/Include/Protocol/PciPlatform.h b/MdePkg/Include/Protocol/PciPlatform.h
index c1753919446c47c3f8aa4ace838b6d610816341f..761a32afc114889503a61af28da72d50facf980c 100644 (file)
--- a/MdePkg/Include/Protocol/PciPlatform.h
+++ b/MdePkg/Include/Protocol/PciPlatform.h
@@ -1,8 +1,8 @@
 /** @file\r
   This file declares PlatfromOpRom protocols which provides the interface between \r
   the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific \r
-  driver to describe the unique features of a platform. This\r
-  protocol is optional.\r
+  driver to describe the unique features of a platform. \r
+  This protocol is optional.\r
   \r
   Copyright (c) 2007 - 2009, Intel Corporation\r
   All rights reserved. This program and the accompanying materials\r
@@ -42,7 +42,7 @@
 typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;\r
 \r
 ///\r
-/// EFI_PCI_PLATYFORM_POLICY that is a bitmask with the following legal combinations:\r
+/// EFI_PCI_PLATFORM_POLICY that is a bitmask with the following legal combinations:\r
 ///   - EFI_RESERVE_NONE_IO_ALIAS:<BR>\r
 ///       Does not set aside either ISA or VGA I/O resources during PCI\r
 ///       enumeration. By using this selection, the platform indicates that it does\r
@@ -203,7 +203,7 @@ typedef EFI_PCI_EXECUTION_PHASE EFI_PCI_CHIPSET_EXECUTION_PHASE;
   @param[in] This           Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
   @param[in] HostBridge     The handle of the host bridge controller.\r
   @param[in] Phase          The phase of the PCI bus enumeration.\r
-  @param[in] ChipsetPhase   Defines the execution phase of the PCI chipset driver.\r
+  @param[in] ExecPhase      Defines the execution phase of the PCI chipset driver.\r
 \r
   @retval EFI_SUCCESS   The function completed successfully.\r
 \r
@@ -214,7 +214,7 @@ EFI_STATUS
   IN EFI_PCI_PLATFORM_PROTOCOL                      *This,\r
   IN EFI_HANDLE                                     HostBridge,\r
   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,\r
-  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase\r
+  IN EFI_PCI_EXECUTION_PHASE                        ExecPhase\r
   );\r
 \r
 /**\r
@@ -238,7 +238,7 @@ EFI_STATUS
   @param[in] RootBridge     The associated PCI root bridge handle.\r
   @param[in] PciAddress     The address of the PCI device on the PCI bus.\r
   @param[in] Phase          The phase of the PCI controller enumeration.\r
-  @param[in] ChipsetPhase   Defines the execution phase of the PCI chipset driver.\r
+  @param[in] ExecPhase      Defines the execution phase of the PCI chipset driver.\r
 \r
   @retval EFI_SUCCESS   The function completed successfully.\r
 \r
@@ -251,7 +251,7 @@ EFI_STATUS
   IN EFI_HANDLE                                    RootBridge,\r
   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,\r
   IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,\r
-  IN EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase\r
+  IN EFI_PCI_EXECUTION_PHASE                       ExecPhase\r
   );\r
 \r
 /**\r
@@ -271,8 +271,8 @@ EFI_STATUS
 typedef\r
 EFI_STATUS\r
 (EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r
-  IN  EFI_PCI_PLATFORM_PROTOCOL  *This,\r
-  OUT EFI_PCI_PLATFORM_POLICY    *PciPolicy\r
+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,\r
+  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy\r
   );\r
 \r
 /**\r
@@ -307,10 +307,10 @@ EFI_STATUS
 typedef\r
 EFI_STATUS\r
 (EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM)(\r
-  IN  EFI_PCI_PLATFORM_PROTOCOL  *This,\r
-  IN  EFI_HANDLE                 PciHandle,\r
-  OUT VOID                       **RomImage,\r
-  OUT UINTN                      *RomSize\r
+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,\r
+  IN        EFI_HANDLE                 PciHandle,\r
+  OUT       VOID                       **RomImage,\r
+  OUT       UINTN                      *RomSize\r
   );\r
 \r
 ///\r