/** @file\r
PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.\r
\r
- PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
- and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
- defferent types of bus mastering DMA\r
+ PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,\r
+ and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform\r
+ defferent types of bus mastering DMA.\r
\r
- Copyright (c) 2006 - 2008, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
#define __PCI_ROOT_BRIDGE_IO_H__\r
\r
+#include <Library/BaseLib.h>\r
+\r
#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
{ \\r
0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
\r
typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
\r
+///\r
+/// *******************************************************\r
+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH\r
+/// *******************************************************\r
+///\r
typedef enum {\r
EfiPciWidthUint8,\r
EfiPciWidthUint16,\r
EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
+///\r
+/// *******************************************************\r
+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION\r
+/// *******************************************************\r
+///\r
typedef enum {\r
+ ///\r
+ /// A read operation from system memory by a bus master that is not capable of producing\r
+ /// PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterRead,\r
+ ///\r
+ /// A write operation from system memory by a bus master that is not capable of producing\r
+ /// PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterWrite,\r
+ ///\r
+ /// Provides both read and write access to system memory by both the processor and a bus\r
+ /// master that is not capable of producing PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterCommonBuffer,\r
+ ///\r
+ /// A read operation from system memory by a bus master that is capable of producing PCI\r
+ /// dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterRead64,\r
+ ///\r
+ /// A write operation to system memory by a bus master that is capable of producing PCI\r
+ /// dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterWrite64,\r
+ ///\r
+ /// Provides both read and write access to system memory by both the processor and a bus\r
+ /// master that is capable of producing PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterCommonBuffer64,\r
EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800\r
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000\r
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
+#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000\r
+#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000\r
+#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000\r
\r
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
- ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
+ (UINT64) ( \\r
+ (((UINTN) bus) << 24) | \\r
+ (((UINTN) dev) << 16) | \\r
+ (((UINTN) func) << 8) | \\r
+ (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))\r
\r
typedef struct {\r
UINT8 Register;\r
UINT32 ExtendedRegister;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
\r
-/** \r
+/**\r
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
satisfied or after a defined duration.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Width Signifies the width of the memory or I/O operations.\r
- @param Address The base address of the memory or I/O operations. \r
+ @param Address The base address of the memory or I/O operations.\r
@param Mask Mask used for the polling criteria.\r
@param Value The comparison value used for the polling exit criteria.\r
@param Delay The number of 100 ns units to poll.\r
@param Result Pointer to the last value read from the memory location.\r
- \r
+\r
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
@retval EFI_TIMEOUT Delay expired before a match occurred.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
OUT UINT64 *Result\r
);\r
\r
-/** \r
+/**\r
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @param Address The base address of the memory operations. \r
+ @param Address The base address of the memory operations.\r
@param Count The number of memory operations to perform.\r
@param Buffer For read operations, the destination buffer to store the results. For write\r
- operations, the source buffer to write data from. \r
- \r
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. \r
+ operations, the source buffer to write data from.\r
+\r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
);\r
\r
typedef struct {\r
+ ///\r
+ /// Read PCI controller registers in the PCI root bridge memory space.\r
+ ///\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;\r
+ ///\r
+ /// Write PCI controller registers in the PCI root bridge memory space.\r
+ ///\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
\r
-/** \r
+/**\r
Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
- root bridge memory space. \r
- \r
+ root bridge memory space.\r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
@param Width Signifies the width of the memory operations.\r
- @param DestAddress The destination address of the memory operation. \r
- @param SrcAddress The source address of the memory operation. \r
- @param Count The number of memory operations to perform. \r
- \r
- @retval EFI_SUCCESS The data was copied from one memory region to another memory region. \r
+ @param DestAddress The destination address of the memory operation.\r
+ @param SrcAddress The source address of the memory operation.\r
+ @param Count The number of memory operations to perform.\r
+\r
+ @retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN UINTN Count\r
);\r
\r
-/** \r
- Provides the PCI controller-Cspecific addresses required to access system memory from a\r
- DMA bus master. \r
- \r
+/**\r
+ Provides the PCI controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Operation Indicates if the bus master is going to read or write to system memory.\r
@param HostAddress The system memory address to map to the PCI controller.\r
@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
- that were mapped. \r
+ that were mapped.\r
@param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
- access the hosts HostAddress. \r
+ access the hosts HostAddress.\r
@param Mapping A resulting value to pass to Unmap().\r
- \r
+\r
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
- @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
OUT VOID **Mapping\r
);\r
\r
-/** \r
+/**\r
Completes the Map() operation and releases any corresponding resources.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Mapping The mapping value returned from Map().\r
- \r
+\r
@retval EFI_SUCCESS The range was unmapped.\r
@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN VOID *Mapping\r
);\r
\r
-/** \r
+/**\r
Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
- EfiPciOperationBusMasterCommonBuffer64 mapping. \r
- \r
+ EfiPciOperationBusMasterCommonBuffer64 mapping.\r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Type This parameter is not used and must be ignored.\r
@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
- EfiRuntimeServicesData. \r
- @param Pages The number of pages to allocate. \r
+ EfiRuntimeServicesData.\r
+ @param Pages The number of pages to allocate.\r
@param HostAddress A pointer to store the base system memory address of the\r
- allocated range. \r
+ allocated range.\r
@param Attributes The requested bit mask of attributes for the allocated range.\r
- \r
+\r
@retval EFI_SUCCESS The requested memory pages were allocated.\r
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
- MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
- @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
- \r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN UINT64 Attributes\r
);\r
\r
-/** \r
+/**\r
Frees memory that was allocated with AllocateBuffer().\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
- @param Pages The number of pages to free. \r
- @param HostAddress The base system memory address of the allocated range. \r
- \r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+\r
@retval EFI_SUCCESS The requested memory pages were freed.\r
@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
was not allocated with AllocateBuffer().\r
- \r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN VOID *HostAddress\r
);\r
\r
-/** \r
+/**\r
Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
- \r
+\r
@retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
- bridge to system memory. \r
+ bridge to system memory.\r
@retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
- host bridge due to a hardware error. \r
- \r
+ host bridge due to a hardware error.\r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r
);\r
\r
-/** \r
+/**\r
Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
- attributes that a PCI root bridge is currently using. \r
- \r
+ attributes that a PCI root bridge is currently using.\r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Supports A pointer to the mask of attributes that this PCI root bridge supports\r
- setting with SetAttributes(). \r
+ setting with SetAttributes().\r
@param Attributes A pointer to the mask of attributes that this PCI root bridge is currently\r
- using. \r
- \r
- @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root \r
- bridge supports is returned in Supports. If Attributes is \r
+ using.\r
+\r
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root\r
+ bridge supports is returned in Supports. If Attributes is\r
not NULL, then the attributes that the PCI root bridge is currently\r
- using is returned in Attributes. \r
+ using is returned in Attributes.\r
@retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
- \r
- \r
+\r
+\r
**/\r
typedef\r
EFI_STATUS\r
OUT UINT64 *Attributes\r
);\r
\r
-/** \r
+/**\r
Sets attributes for a resource range on a PCI root bridge.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Attributes The mask of attributes to set.\r
@param ResourceBase A pointer to the base address of the resource range to be modified by the\r
attributes specified by Attributes.\r
@param ResourceLength A pointer to the length of the resource range to be modified by the\r
- attributes specified by Attributes. \r
- \r
- @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource \r
- range specified by ResourceBase and ResourceLength \r
+ attributes specified by Attributes.\r
+\r
+ @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource\r
+ range specified by ResourceBase and ResourceLength\r
were set on the PCI root bridge, and the actual resource range is\r
- returned in ResuourceBase and ResourceLength. \r
+ returned in ResuourceBase and ResourceLength.\r
@retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root\r
- Bridge. \r
- @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the \r
- resource range specified by BaseAddress and Length. \r
- @retval EFI_INVALID_PARAMETER One or more parameters are invalid. \r
- \r
+ Bridge.\r
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the\r
+ resource range specified by BaseAddress and Length.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+\r
**/\r
typedef\r
EFI_STATUS\r
IN OUT UINT64 *ResourceLength\r
);\r
\r
-/** \r
- Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
- resource descriptors. \r
- \r
+/**\r
+ Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI\r
+ resource descriptors.\r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
- @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current\r
- configuration of this PCI root bridge. \r
- \r
+ @param Resources A pointer to the resource descriptors that describe the current\r
+ configuration of this PCI root bridge.\r
+\r
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in\r
- Resources. \r
+ Resources.\r
@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be\r
- retrieved. \r
- \r
+ retrieved.\r
+\r
**/\r
typedef\r
EFI_STATUS\r
OUT VOID **Resources\r
);\r
\r
-/** \r
- @par Protocol Description:\r
- Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are \r
- used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. \r
- \r
- @param ParentHandle\r
- The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.\r
-\r
- @param PollMem\r
- Polls an address in memory mapped I/O space until an exit condition is met, \r
- or a timeout occurs. \r
-\r
- @param PollIo\r
- Polls an address in I/O space until an exit condition is met, or a timeout occurs. \r
-\r
- @param Mem.Read\r
- Allows reads from memory mapped I/O space. \r
-\r
- @param Mem.Write\r
- Allows writes to memory mapped I/O space. \r
-\r
- @param Io.Read\r
- Allows reads from I/O space. \r
-\r
- @param Io.Write\r
- Allows writes to I/O space. \r
-\r
- @param Pci.Read\r
- Allows reads from PCI configuration space. \r
-\r
- @param Pci.Write\r
- Allows writes to PCI configuration space. \r
-\r
- @param CopyMem\r
- Allows one region of PCI root bridge memory space to be copied to another \r
- region of PCI root bridge memory space. \r
-\r
- @param Map\r
- Provides the PCI controller's specific addresses needed to access system memory for DMA. \r
-\r
- @param Unmap\r
- Releases any resources allocated by Map(). \r
-\r
- @param AllocateBuffer\r
- Allocates pages that are suitable for a common buffer mapping. \r
-\r
- @param FreeBuffer\r
- Free pages that were allocated with AllocateBuffer(). \r
-\r
- @param Flush\r
- Flushes all PCI posted write transactions to system memory. \r
-\r
- @param GetAttributes\r
- Gets the attributes that a PCI root bridge supports setting with SetAttributes(), \r
- and the attributes that a PCI root bridge is currently using. \r
-\r
- @param SetAttributes\r
- Sets attributes for a resource range on a PCI root bridge. \r
-\r
- @param Configuration\r
- Gets the current resource settings for this PCI root bridge. \r
-\r
- @param SegmentNumber\r
- The segment number that this PCI root bridge resides.\r
-\r
-**/\r
+///\r
+/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are\r
+/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.\r
+///\r
struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
+ ///\r
+ /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.\r
+ ///\r
EFI_HANDLE ParentHandle;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;\r
+\r
+ ///\r
+ /// The segment number that this PCI root bridge resides.\r
+ ///\r
UINT32 SegmentNumber;\r
};\r
\r