\r
This protocol provides CPU I/O and memory access within SMM.\r
\r
- Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#ifndef _SMM_CPU_IO2_H_\r
#define _SMM_CPU_IO2_H_\r
\r
-#define EFI_SMM_CPU_IO2_PROTOCOL_GUID \\r
- { \\r
- 0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \\r
- }\r
+#include <Protocol/MmCpuIo.h>\r
\r
-typedef struct _EFI_SMM_CPU_IO2_PROTOCOL EFI_SMM_CPU_IO2_PROTOCOL;\r
+#define EFI_SMM_CPU_IO2_PROTOCOL_GUID EFI_MM_CPU_IO_PROTOCOL_GUID\r
+\r
+typedef EFI_MM_CPU_IO_PROTOCOL EFI_SMM_CPU_IO2_PROTOCOL;\r
\r
///\r
/// Width of the SMM CPU I/O operations\r
///\r
-typedef enum {\r
- SMM_IO_UINT8 = 0,\r
- SMM_IO_UINT16 = 1,\r
- SMM_IO_UINT32 = 2,\r
- SMM_IO_UINT64 = 3\r
-} EFI_SMM_IO_WIDTH;\r
-\r
-/**\r
- Provides the basic memory and I/O interfaces used toabstract accesses to devices.\r
-\r
- The I/O operations are carried out exactly as requested. The caller is \r
- responsible for any alignment and I/O width issues that the bus, device, \r
- platform, or type of I/O might require.\r
-\r
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.\r
- @param[in] Width Signifies the width of the I/O operations.\r
- @param[in] Address The base address of the I/O operations. The caller is \r
- responsible for aligning the Address if required. \r
- @param[in] Count The number of I/O operations to perform.\r
- @param[in,out] Buffer For read operations, the destination buffer to store \r
- the results. For write operations, the source buffer \r
- from which to write data.\r
+#define SMM_IO_UINT8 MM_IO_UINT8\r
+#define SMM_IO_UINT16 MM_IO_UINT16\r
+#define SMM_IO_UINT32 MM_IO_UINT32\r
+#define SMM_IO_UINT64 MM_IO_UINT64\r
\r
- @retval EFI_SUCCESS The data was read from or written to the device.\r
- @retval EFI_UNSUPPORTED The Address is not valid for this system.\r
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack\r
- of resources.\r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_SMM_CPU_IO2)(\r
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,\r
- IN EFI_SMM_IO_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Count,\r
- IN OUT VOID *Buffer\r
- );\r
-\r
-typedef struct {\r
- ///\r
- /// This service provides the various modalities of memory and I/O read.\r
- ///\r
- EFI_SMM_CPU_IO2 Read;\r
- ///\r
- /// This service provides the various modalities of memory and I/O write.\r
- ///\r
- EFI_SMM_CPU_IO2 Write;\r
-} EFI_SMM_IO_ACCESS2;\r
+typedef EFI_MM_IO_WIDTH EFI_SMM_IO_WIDTH;\r
+typedef EFI_MM_CPU_IO EFI_SMM_CPU_IO2;\r
\r
-///\r
-/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.\r
-///\r
-struct _EFI_SMM_CPU_IO2_PROTOCOL {\r
- ///\r
- /// Allows reads and writes to memory-mapped I/O space.\r
- ///\r
- EFI_SMM_IO_ACCESS2 Mem;\r
- ///\r
- /// Allows reads and writes to I/O space.\r
- ///\r
- EFI_SMM_IO_ACCESS2 Io;\r
-};\r
+typedef EFI_MM_IO_ACCESS EFI_SMM_IO_ACCESS2;\r
\r
extern EFI_GUID gEfiSmmCpuIo2ProtocolGuid;\r
\r