\r
@param Length The number of bytes to invalidate from the instruction cache.\r
\r
- @return Address of cache invalidation.\r
+ @return Address.\r
\r
**/\r
VOID *\r
)\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
}\r
\r
/**\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
}\r
\r
/**\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
}\r
\r
/**\r
then Address is a virtual address.\r
@param Length The number of bytes to invalidate from the data cache.\r
\r
- @return Address of cache invalidation.\r
+ @return Address.\r
\r
**/\r
VOID *\r
// Invalidation of a data cache range without writing back is not supported on\r
// IPF architecture, so write back and invalidate operation is performed.\r
//\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
}\r