-#------------------------------------------------------------------------------
-#
-# DisableInterrupts() for ARM
-#
-# Copyright (c) 2006 - 2009, Intel Corporation<BR>
-# Portions copyright (c) 2008-2009 Apple Inc.<BR>
-# All rights reserved. This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-.text
-.p2align 2
-.globl ASM_PFX(DisableInterrupts)
-
-#/**
-# Disables CPU interrupts.
-#
-#**/
-#VOID
-#EFIAPI
-#DisableInterrupts (
-# VOID
-# );
-#
-ASM_PFX(DisableInterrupts):
- mrs R0,CPSR
- orr R0,R0,#0x80 @Disable IRQ interrupts
- msr CPSR_c,R0
- bx LR
+#------------------------------------------------------------------------------ \r
+#\r
+# DisableInterrupts() for ARM\r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation<BR>\r
+# Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+.globl ASM_PFX(DisableInterrupts)\r
+\r
+#/**\r
+# Disables CPU interrupts.\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#DisableInterrupts (\r
+# VOID\r
+# );\r
+#\r
+ASM_PFX(DisableInterrupts):\r
+ mrs R0,CPSR\r
+ orr R0,R0,#0x80 @Disable IRQ interrupts\r
+ msr CPSR_c,R0\r
+ bx LR\r