#/** @file\r
-# Component description file for Base Library\r
-#\r
# Base Library implementation.\r
-# Copyright (c) 2007, Intel Corporation.\r
+#\r
+# Copyright (c) 2007 - 2008, Intel Corporation.\r
#\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MODULE_TYPE = BASE\r
VERSION_STRING = 1.0\r
LIBRARY_CLASS = BaseLib \r
- EDK_RELEASE_VERSION = 0x00020000\r
- EFI_SPECIFICATION_VERSION = 0x00020000\r
-\r
\r
#\r
# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
Ia32/WriteCr2.c | MSFT \r
Ia32/WriteCr0.c | MSFT \r
Ia32/WriteMsr64.c | MSFT \r
- Ia32/Thunk16.asm\r
Ia32/SwapBytes64.c | MSFT \r
Ia32/SetJump.c | MSFT \r
Ia32/RRotU64.c | MSFT \r
Ia32/FxRestore.c | MSFT \r
Ia32/FxSave.c | MSFT \r
Ia32/FlushCacheLine.c | MSFT \r
- Ia32/EnablePaging64.asm\r
Ia32/EnablePaging32.c | MSFT \r
Ia32/EnableInterrupts.c | MSFT \r
Ia32/EnableDisableInterrupts.c | MSFT \r
- Ia32/DivU64x64Remainder.c | MSFT \r
+ Ia32/DivU64x64Remainder.asm | MSFT \r
Ia32/DivU64x32Remainder.c | MSFT \r
Ia32/DivU64x32.c | MSFT \r
Ia32/DisablePaging32.c | MSFT \r
Ia32/CpuPause.c | MSFT \r
Ia32/CpuIdEx.c | MSFT \r
Ia32/CpuId.c | MSFT \r
- Ia32/CpuSleep.c | MSFT \r
- Ia32/CpuFlushTlb.c | MSFT \r
Ia32/CpuBreakpoint.c | MSFT \r
Ia32/ARShiftU64.c | MSFT \r
+ Ia32/Thunk16.asm | MSFT\r
+ Ia32/EnablePaging64.asm | MSFT\r
+ Ia32/EnableCache.c | MSFT\r
+ Ia32/DisableCache.c | MSFT\r
+ SynchronizationMsc.c | MSFT\r
+\r
+ Ia32/Wbinvd.asm | INTEL \r
+ Ia32/WriteMm7.asm | INTEL \r
+ Ia32/WriteMm6.asm | INTEL \r
+ Ia32/WriteMm5.asm | INTEL \r
+ Ia32/WriteMm4.asm | INTEL \r
+ Ia32/WriteMm3.asm | INTEL \r
+ Ia32/WriteMm2.asm | INTEL \r
+ Ia32/WriteMm1.asm | INTEL \r
+ Ia32/WriteMm0.asm | INTEL \r
+ Ia32/WriteLdtr.asm | INTEL \r
+ Ia32/WriteIdtr.asm | INTEL \r
+ Ia32/WriteGdtr.asm | INTEL \r
+ Ia32/WriteDr7.asm | INTEL \r
+ Ia32/WriteDr6.asm | INTEL \r
+ Ia32/WriteDr5.asm | INTEL \r
+ Ia32/WriteDr4.asm | INTEL \r
+ Ia32/WriteDr3.asm | INTEL \r
+ Ia32/WriteDr2.asm | INTEL \r
+ Ia32/WriteDr1.asm | INTEL \r
+ Ia32/WriteDr0.asm | INTEL \r
+ Ia32/WriteCr4.asm | INTEL \r
+ Ia32/WriteCr3.asm | INTEL \r
+ Ia32/WriteCr2.asm | INTEL \r
+ Ia32/WriteCr0.asm | INTEL \r
+ Ia32/WriteMsr64.asm | INTEL \r
+ Ia32/SwapBytes64.asm | INTEL \r
+ Ia32/SetJump.asm | INTEL \r
+ Ia32/RRotU64.asm | INTEL \r
+ Ia32/RShiftU64.asm | INTEL \r
+ Ia32/ReadPmc.asm | INTEL \r
+ Ia32/ReadTsc.asm | INTEL \r
+ Ia32/ReadLdtr.asm | INTEL \r
+ Ia32/ReadIdtr.asm | INTEL \r
+ Ia32/ReadGdtr.asm | INTEL \r
+ Ia32/ReadTr.asm | INTEL \r
+ Ia32/ReadSs.asm | INTEL \r
+ Ia32/ReadGs.asm | INTEL \r
+ Ia32/ReadFs.asm | INTEL \r
+ Ia32/ReadEs.asm | INTEL \r
+ Ia32/ReadDs.asm | INTEL \r
+ Ia32/ReadCs.asm | INTEL \r
+ Ia32/ReadMsr64.asm | INTEL \r
+ Ia32/ReadMm7.asm | INTEL \r
+ Ia32/ReadMm6.asm | INTEL \r
+ Ia32/ReadMm5.asm | INTEL \r
+ Ia32/ReadMm4.asm | INTEL \r
+ Ia32/ReadMm3.asm | INTEL \r
+ Ia32/ReadMm2.asm | INTEL \r
+ Ia32/ReadMm1.asm | INTEL \r
+ Ia32/ReadMm0.asm | INTEL \r
+ Ia32/ReadEflags.asm | INTEL \r
+ Ia32/ReadDr7.asm | INTEL \r
+ Ia32/ReadDr6.asm | INTEL \r
+ Ia32/ReadDr5.asm | INTEL \r
+ Ia32/ReadDr4.asm | INTEL \r
+ Ia32/ReadDr3.asm | INTEL \r
+ Ia32/ReadDr2.asm | INTEL \r
+ Ia32/ReadDr1.asm | INTEL \r
+ Ia32/ReadDr0.asm | INTEL \r
+ Ia32/ReadCr4.asm | INTEL \r
+ Ia32/ReadCr3.asm | INTEL \r
+ Ia32/ReadCr2.asm | INTEL \r
+ Ia32/ReadCr0.asm | INTEL \r
+ Ia32/Mwait.asm | INTEL \r
+ Ia32/Monitor.asm | INTEL \r
+ Ia32/ModU64x32.asm | INTEL \r
+ Ia32/MultU64x64.asm | INTEL \r
+ Ia32/MultU64x32.asm | INTEL \r
+ Ia32/LShiftU64.asm | INTEL \r
+ Ia32/LRotU64.asm | INTEL \r
+ Ia32/LongJump.asm | INTEL \r
+ Ia32/Invd.asm | INTEL \r
+ Ia32/InterlockedCompareExchange64.asm | INTEL \r
+ Ia32/InterlockedCompareExchange32.asm | INTEL \r
+ Ia32/InterlockedDecrement.asm | INTEL \r
+ Ia32/InterlockedIncrement.asm | INTEL \r
+ Ia32/FxRestore.asm | INTEL \r
+ Ia32/FxSave.asm | INTEL \r
+ Ia32/FlushCacheLine.asm | INTEL \r
+ Ia32/EnablePaging32.asm | INTEL \r
+ Ia32/EnableInterrupts.asm | INTEL \r
+ Ia32/EnableDisableInterrupts.asm | INTEL \r
+ Ia32/DivU64x64Remainder.asm | INTEL \r
+ Ia32/DivU64x32Remainder.asm | INTEL \r
+ Ia32/DivU64x32.asm | INTEL \r
+ Ia32/DisablePaging32.asm | INTEL \r
+ Ia32/DisableInterrupts.asm | INTEL \r
+ Ia32/CpuPause.asm | INTEL \r
+ Ia32/CpuIdEx.asm | INTEL \r
+ Ia32/CpuId.asm | INTEL \r
+ Ia32/CpuBreakpoint.asm | INTEL \r
+ Ia32/ARShiftU64.asm | INTEL \r
+ Ia32/Thunk16.asm | INTEL\r
+ Ia32/EnablePaging64.asm | INTEL\r
+ Ia32/EnableCache.asm | INTEL\r
+ Ia32/DisableCache.asm | INTEL\r
+ Synchronization.c | INTEL\r
+\r
Ia32/Thunk16.S | GCC \r
- Ia32/CpuFlushTlb.S | GCC \r
Ia32/CpuBreakpoint.S | GCC \r
Ia32/CpuPause.S | GCC \r
- Ia32/CpuSleep.S | GCC \r
Ia32/EnableDisableInterrupts.S | GCC \r
Ia32/DisableInterrupts.S | GCC \r
Ia32/EnableInterrupts.S | GCC \r
Ia32/ARShiftU64.S | GCC \r
Ia32/RShiftU64.S | GCC \r
Ia32/LShiftU64.S | GCC \r
+ Ia32/EnableCache.S | GCC\r
+ Ia32/DisableCache.S | GCC\r
+ SynchronizationGcc.c | GCC\r
+\r
Ia32/DivS64x64Remainder.c\r
Ia32/InternalSwitchStack.c\r
Ia32/Non-existing.c\r
Unaligned.c\r
- x86WriteIdtr.c\r
- x86WriteGdtr.c\r
- x86Thunk.c\r
- x86ReadIdtr.c\r
- x86ReadGdtr.c\r
- x86Msr.c\r
- x86MemoryFence.c\r
- x86GetInterruptState.c\r
- x86FxSave.c\r
- x86FxRestore.c\r
- x86EnablePaging64.c\r
- x86EnablePaging32.c\r
- x86DisablePaging64.c\r
- x86DisablePaging32.c\r
- Synchronization.c | INTEL\r
- SynchronizationMsc.c | MSFT\r
- SynchronizationGcc.c | GCC\r
+ X86WriteIdtr.c\r
+ X86WriteGdtr.c\r
+ X86Thunk.c\r
+ X86ReadIdtr.c\r
+ X86ReadGdtr.c\r
+ X86Msr.c\r
+ X86MemoryFence.c\r
+ X86GetInterruptState.c\r
+ X86FxSave.c\r
+ X86FxRestore.c\r
+ X86EnablePaging64.c\r
+ X86EnablePaging32.c\r
+ X86DisablePaging64.c\r
+ X86DisablePaging32.c\r
\r
[Sources.X64]\r
X64/Thunk16.asm\r
- X64/CpuFlushTlb.asm\r
- X64/CpuBreakpoint.c | MSFT \r
X64/CpuPause.asm\r
- X64/CpuSleep.asm\r
X64/EnableDisableInterrupts.asm\r
X64/DisableInterrupts.asm\r
X64/EnableInterrupts.asm\r
- X64/InterlockedCompareExchange64.asm | MSFT \r
- X64/InterlockedCompareExchange32.asm | MSFT \r
- X64/InterlockedDecrement.c | MSFT \r
- X64/InterlockedIncrement.c | MSFT \r
X64/FlushCacheLine.asm\r
X64/Invd.asm\r
X64/Wbinvd.asm\r
X64/ReadCr3.asm\r
X64/ReadCr2.asm\r
X64/ReadCr0.asm\r
- X64/WriteMsr64.c | MSFT \r
- X64/ReadMsr64.c | MSFT \r
X64/ReadEflags.asm\r
X64/CpuIdEx.asm\r
X64/CpuId.asm\r
X64/LongJump.asm\r
X64/SetJump.asm\r
X64/SwitchStack.asm\r
+ X64/InterlockedCompareExchange64.asm \r
+ X64/InterlockedCompareExchange32.asm \r
+ X64/EnableCache.asm\r
+ X64/DisableCache.asm\r
+\r
+ X64/InterlockedDecrement.c | MSFT \r
+ X64/InterlockedIncrement.c | MSFT \r
+ X64/CpuBreakpoint.c | MSFT \r
+ X64/WriteMsr64.c | MSFT \r
+ X64/ReadMsr64.c | MSFT \r
+ SynchronizationMsc.c | MSFT \r
+\r
+ X64/InterlockedDecrement.asm | INTEL \r
+ X64/InterlockedIncrement.asm | INTEL \r
+ X64/CpuBreakpoint.asm | INTEL \r
+ X64/WriteMsr64.asm | INTEL \r
+ X64/ReadMsr64.asm | INTEL \r
+ Synchronization.c | INTEL \r
+\r
X64/Non-existing.c\r
Math64.c\r
Unaligned.c\r
- x86WriteIdtr.c\r
- x86WriteGdtr.c\r
- x86Thunk.c\r
- x86ReadIdtr.c\r
- x86ReadGdtr.c\r
- x86Msr.c\r
- x86MemoryFence.c\r
- x86GetInterruptState.c\r
- x86FxSave.c\r
- x86FxRestore.c\r
- x86EnablePaging64.c\r
- x86EnablePaging32.c\r
- x86DisablePaging64.c\r
- x86DisablePaging32.c\r
+ X86WriteIdtr.c\r
+ X86WriteGdtr.c\r
+ X86Thunk.c\r
+ X86ReadIdtr.c\r
+ X86ReadGdtr.c\r
+ X86Msr.c\r
+ X86MemoryFence.c\r
+ X86GetInterruptState.c\r
+ X86FxSave.c\r
+ X86FxRestore.c\r
+ X86EnablePaging64.c\r
+ X86EnablePaging32.c\r
+ X86DisablePaging64.c\r
+ X86DisablePaging32.c\r
X64/WriteMsr64.S | GCC \r
X64/WriteMm7.S | GCC \r
X64/WriteMm6.S | GCC \r
X64/EnableDisableInterrupts.S | GCC \r
X64/DisablePaging64.S | GCC \r
X64/DisableInterrupts.S | GCC \r
- X64/CpuSleep.S | GCC \r
X64/CpuPause.S | GCC \r
X64/CpuId.S | GCC \r
X64/CpuIdEx.S | GCC \r
- X64/CpuFlushTlb.S | GCC \r
X64/CpuBreakpoint.S | GCC \r
- Synchronization.c | INTEL \r
- SynchronizationMsc.c | MSFT \r
SynchronizationGcc.c | GCC \r
+ X64/EnableCache.S | GCC\r
+ X64/DisableCache.S | GCC\r
+ ChkStkGcc.c | GCC \r
\r
[Sources.IPF]\r
+ Ipf/AsmCpuMisc.s\r
Ipf/AccessGp.s\r
Ipf/ReadCpuid.s\r
Ipf/ExecFc.s\r
Ipf/FlushCacheRange.s\r
Ipf/InternalSwitchStack.c\r
Ipf/GetInterruptState.s\r
- Ipf/CpuFlushTlb.s\r
Ipf/CpuPause.s\r
Ipf/Synchronization.c\r
Ipf/InterlockedCompareExchange64.s\r
Ipf/InterlockedCompareExchange32.s\r
- Ipf/CpuBreakpoint.c\r
+ Ipf/CpuBreakpoint.c | INTEL\r
+ Ipf/CpuBreakpointMsc.c | MSFT\r
Ipf/Unaligned.c\r
Ipf/SwitchStack.s\r
- Ipf/longjmp.s\r
- Ipf/setjmp.s\r
- Ipf/PalCallStatic.s\r
- Ipf/ia_64gen.h\r
- Ipf/asm.h\r
+ Ipf/LongJmp.s\r
+ Ipf/SetJmp.s\r
+ Ipf/ReadCr.s\r
+ Ipf/ReadControlRegister.c\r
+ Ipf/ReadAr.s\r
+ Ipf/ReadApplicationRegister.c\r
+ Ipf/Ia64gen.h\r
+ Ipf/Asm.h\r
Math64.c\r
Synchronization.c | INTEL \r
SynchronizationMsc.c | MSFT \r
BaseMemoryLib\r
\r
\r
-[PcdsFixedAtBuild.common]\r
- PcdSpinLockTimeout|gEfiMdePkgTokenSpaceGuid\r
- PcdMaximumLinkedListLength|gEfiMdePkgTokenSpaceGuid\r
- PcdMaximumAsciiStringLength|gEfiMdePkgTokenSpaceGuid\r
- PcdMaximumUnicodeStringLength|gEfiMdePkgTokenSpaceGuid\r
+[Pcd.common]\r
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength\r
\r