Add AccessMsrDb.s for MSFT tool chain. It uses raw data to represent instructions...

[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 3a00d1911c0af58f012cbdb85aa574639ab3b91d..99280baaa236e615f5d290ab8f0b7fc7dfb5e8df 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -20,9 +20,6 @@
   MODULE_TYPE                    = BASE\r
   VERSION_STRING                 = 1.0\r
   LIBRARY_CLASS                  = BaseLib \r
-  EDK_RELEASE_VERSION            = 0x00020000\r
-  EFI_SPECIFICATION_VERSION      = 0x00020000\r
-\r
 \r
 #\r
 #  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
@@ -159,6 +156,8 @@
   Ia32/ARShiftU64.c | MSFT \r
   Ia32/Thunk16.asm | MSFT\r
   Ia32/EnablePaging64.asm | MSFT\r
+  Ia32/EnableCache.c | MSFT\r
+  Ia32/DisableCache.c | MSFT\r
   SynchronizationMsc.c  | MSFT\r
 \r
   Ia32/Wbinvd.asm | INTEL \r
@@ -255,6 +254,8 @@
   Ia32/ARShiftU64.asm | INTEL \r
   Ia32/Thunk16.asm | INTEL\r
   Ia32/EnablePaging64.asm | INTEL\r
+  Ia32/EnableCache.asm | INTEL\r
+  Ia32/DisableCache.asm | INTEL\r
   Synchronization.c | INTEL\r
 \r
   Ia32/Thunk16.S | GCC \r
@@ -351,6 +352,8 @@
   Ia32/ARShiftU64.S | GCC \r
   Ia32/RShiftU64.S | GCC \r
   Ia32/LShiftU64.S | GCC \r
+  Ia32/EnableCache.S | GCC\r
+  Ia32/DisableCache.S | GCC\r
   SynchronizationGcc.c  | GCC\r
 \r
   Ia32/DivS64x64Remainder.c\r
@@ -450,6 +453,8 @@
   X64/SwitchStack.asm\r
   X64/InterlockedCompareExchange64.asm \r
   X64/InterlockedCompareExchange32.asm \r
+  X64/EnableCache.asm\r
+  X64/DisableCache.asm\r
 \r
   X64/InterlockedDecrement.c | MSFT \r
   X64/InterlockedIncrement.c | MSFT \r
@@ -565,10 +570,11 @@
   X64/CpuIdEx.S | GCC \r
   X64/CpuBreakpoint.S | GCC \r
   SynchronizationGcc.c  | GCC \r
+  X64/EnableCache.S | GCC\r
+  X64/DisableCache.S | GCC\r
   ChkStkGcc.c  | GCC \r
 \r
 [Sources.IPF]\r
-  Ipf/AsmCpuMisc.s\r
   Ipf/AccessGp.s\r
   Ipf/ReadCpuid.s\r
   Ipf/ExecFc.s\r
@@ -579,6 +585,9 @@
   Ipf/AccessGcr.s\r
   Ipf/AccessEicr.s\r
   Ipf/AccessDbr.s\r
+  Ipf/AccessMsr.s        | INTEL\r
+  Ipf/AccessMsr.s        | GCC\r
+  Ipf/AccessMsrDb.s      | MSFT\r
   Ipf/FlushCacheRange.s\r
   Ipf/InternalSwitchStack.c\r
   Ipf/GetInterruptState.s\r
@@ -588,11 +597,13 @@
   Ipf/InterlockedCompareExchange32.s\r
   Ipf/CpuBreakpoint.c    | INTEL\r
   Ipf/CpuBreakpointMsc.c | MSFT\r
+  Ipf/AsmCpuMisc.s       | GCC\r
   Ipf/Unaligned.c\r
   Ipf/SwitchStack.s\r
   Ipf/LongJmp.s\r
   Ipf/SetJmp.s\r
-  Ipf/PalCallStatic.s\r
+  Ipf/ReadCr.s\r
+  Ipf/ReadAr.s\r
   Ipf/Ia64gen.h\r
   Ipf/Asm.h\r
   Math64.c\r