MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.

[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index fe8f68bbcfcf7ca9659acd5623496030f48486bc..9ed46a584a140bb171a451f2b5f6be68525d9f8e 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -4,7 +4,7 @@
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
-#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+#  Copyright (c) 2020 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -21,7 +21,7 @@
   LIBRARY_CLASS                  = BaseLib\r
 \r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64\r
 #\r
 \r
 [Sources]\r
@@ -32,6 +32,7 @@
   SwapBytes16.c\r
   LongJump.c\r
   SetJump.c\r
+  QuickSort.c\r
   RShiftU64.c\r
   RRotU64.c\r
   RRotU32.c\r
@@ -209,6 +210,7 @@
   X86RdRand.c\r
   X86PatchInstruction.c\r
   X86SpeculationBarrier.c\r
+  IntelTdxNull.c\r
 \r
 [Sources.X64]\r
   X64/Thunk16.nasm\r
@@ -292,6 +294,9 @@
   X64/ReadCr0.nasm| MSFT\r
   X64/ReadEflags.nasm| MSFT\r
 \r
+  X64/TdCall.nasm\r
+  X64/TdVmcall.nasm\r
+  X64/TdProbe.c\r
 \r
   X64/Non-existing.c\r
   Math64.c\r
@@ -317,7 +322,9 @@
   X64/GccInlinePriv.c | GCC\r
   X64/EnableDisableInterrupts.nasm\r
   X64/DisablePaging64.nasm\r
+  X64/Pvalidate.nasm\r
   X64/RdRand.nasm\r
+  X64/RmpAdjust.nasm\r
   X64/XGetBv.nasm\r
   X64/XSetBv.nasm\r
   X64/VmgExit.nasm\r
@@ -334,19 +341,8 @@
 [Sources.ARM]\r
   Arm/InternalSwitchStack.c\r
   Arm/Unaligned.c\r
-  Math64.c                   | RVCT\r
   Math64.c                   | MSFT\r
 \r
-  Arm/SwitchStack.asm        | RVCT\r
-  Arm/SetJumpLongJump.asm    | RVCT\r
-  Arm/DisableInterrupts.asm  | RVCT\r
-  Arm/EnableInterrupts.asm   | RVCT\r
-  Arm/GetInterruptsState.asm | RVCT\r
-  Arm/CpuPause.asm           | RVCT\r
-  Arm/CpuBreakpoint.asm      | RVCT\r
-  Arm/MemoryFence.asm        | RVCT\r
-  Arm/SpeculationBarrier.S   | RVCT\r
-\r
   Arm/SwitchStack.asm        | MSFT\r
   Arm/SetJumpLongJump.asm    | MSFT\r
   Arm/DisableInterrupts.asm  | MSFT\r
@@ -399,12 +395,27 @@
   RiscV64/DisableInterrupts.c\r
   RiscV64/EnableInterrupts.c\r
   RiscV64/CpuPause.c\r
+  RiscV64/MemoryFence.S             | GCC\r
   RiscV64/RiscVSetJumpLongJump.S    | GCC\r
   RiscV64/RiscVCpuBreakpoint.S      | GCC\r
   RiscV64/RiscVCpuPause.S           | GCC\r
   RiscV64/RiscVInterrupt.S          | GCC\r
   RiscV64/FlushCache.S              | GCC\r
 \r
+[Sources.LOONGARCH64]\r
+  Math64.c\r
+  Unaligned.c\r
+  LoongArch64/InternalSwitchStack.c\r
+  LoongArch64/GetInterruptState.S   | GCC\r
+  LoongArch64/EnableInterrupts.S    | GCC\r
+  LoongArch64/DisableInterrupts.S   | GCC\r
+  LoongArch64/Barrier.S             | GCC\r
+  LoongArch64/MemoryFence.S         | GCC\r
+  LoongArch64/CpuBreakpoint.S       | GCC\r
+  LoongArch64/CpuPause.S            | GCC\r
+  LoongArch64/SetJumpLongJump.S     | GCC\r
+  LoongArch64/SwitchStack.S         | GCC\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
 \r
@@ -413,6 +424,9 @@
   DebugLib\r
   BaseMemoryLib\r
 \r
+[LibraryClasses.X64, LibraryClasses.IA32]\r
+  RegisterFilterLib\r
+\r
 [Pcd]\r
   gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength      ## SOMETIMES_CONSUMES\r
   gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength     ## SOMETIMES_CONSUMES\r