remove '../' from Base Library.

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / FlushCacheLine.c

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
index 6da213a6a9676d58fc9fbc654eec23acfaddc135..d6fa2d39e4cbbc6766c6673035542b0be4d3a681 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -1,7 +1,7 @@
 /** @file\r
   AsmFlushCacheLine function\r
 \r
-  Copyright (c) 2006, Intel Corporation<BR>\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -12,8 +12,26 @@
 \r
 **/\r
 \r
-#if _MSC_EXTENSIONS\r
+//\r
+// Include common header file for this module.\r
+//\r
 \r
+\r
+/**\r
+  Flushes a cache line from all the instruction and data caches within the\r
+  coherency domain of the CPU.\r
+\r
+  Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
+  This function is only available on IA-32 and X64.\r
+\r
+  @param  LinearAddress The address of the cache line to flush. If the CPU is\r
+                        in a physical addressing mode, then LinearAddress is a\r
+                        physical address. If the CPU is in a virtual\r
+                        addressing mode, then LinearAddress is a virtual\r
+                        address.\r
+\r
+  @return LinearAddress\r
+**/\r
 VOID *\r
 EFIAPI\r
 AsmFlushCacheLine (\r
@@ -26,4 +44,3 @@ AsmFlushCacheLine (
   }\r
 }\r
 \r
-#endif\r