Fix the bug that if code is run above 4G, AsmDisablePaging64 will be failed

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / FxSave.S

diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.S b/MdePkg/Library/BaseLib/Ia32/FxSave.S
index a558816e1dc391bd766ddb9b35eeb71ce2877079..7d6b379b6d3c401e701479fd39f01d9979150e65 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/FxSave.S
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.S
@@ -1,6 +1,6 @@
 #------------------------------------------------------------------------------\r
 #\r
-# Copyright (c) 2006, Intel Corporation\r
+# Copyright (c) 2006 - 2008, Intel Corporation\r
 # All rights reserved. This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
 # which accompanies this distribution.  The full text of the license may be found at\r
@@ -11,7 +11,7 @@
 #\r
 # Module Name:\r
 #\r
-#   FxSave.Asm\r
+#   FxSave.S\r
 #\r
 # Abstract:\r
 #\r
@@ -21,10 +21,7 @@
 #\r
 #------------------------------------------------------------------------------\r
 \r
-\r
-\r
-     \r
-     \r
+ASM_GLOBAL ASM_PFX(InternalX86FxSave)\r
 \r
 #------------------------------------------------------------------------------\r
 # VOID\r
@@ -33,11 +30,7 @@
 #   OUT IA32_FX_BUFFER *Buffer\r
 #   );\r
 #------------------------------------------------------------------------------\r
-.global _InternalX86FxSave\r
-_InternalX86FxSave: \r
-    movl    4(%esp),%eax\r
+ASM_PFX(InternalX86FxSave):\r
+    movl    4(%esp), %eax               # Buffer must be 16-byte aligned\r
     fxsave  (%eax)\r
     ret\r
-\r
-\r
-\r