#------------------------------------------------------------------------------\r
#\r
-# Copyright (c) 2006, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
+# http://opensource.org/licenses/bsd-license.php.\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
#------------------------------------------------------------------------------\r
\r
-.globl _m16Start, _m16Size, _mThunk16Attr, _m16Gdt, _m16GdtrBase, _mTransition\r
-.globl _InternalAsmThunk16\r
+#include <Library/BaseLib.h>\r
\r
-_m16Start:\r
+ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
+ASM_GLOBAL ASM_PFX(InternalAsmThunk16)\r
+\r
+ASM_PFX(m16Start):\r
\r
SavedGdt: .space 6\r
\r
-_BackFromUserCode:\r
+ASM_PFX(BackFromUserCode):\r
push %ss\r
push %cs\r
.byte 0x66\r
push %ds\r
pushaw # pushad actually\r
.byte 0x66, 0xba # mov edx, imm32\r
-_ThunkAttr: .space 4\r
+ASM_PFX(ThunkAttr): .space 4\r
testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
jz 1f\r
movl $0x15cd2401, %eax # mov ax, 2401h & int 15h\r
.byte 0x66\r
lret # return to protected mode\r
\r
-_EntryPoint: .long _ToUserCode - _m16Start\r
+_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
.word 0x8\r
_16Idtr: .word 0x3ff\r
.long 0\r
_16Gdtr: .word GdtEnd - _NullSegDesc - 1\r
-_16GdtrBase: .long _NullSegDesc\r
+_16GdtrBase: .long _NullSegDesc\r
\r
-_ToUserCode:\r
+ASM_PFX(ToUserCode):\r
movl %ss, %edx\r
movl %ecx, %ss # set new segment selectors\r
movl %ecx, %ds\r
call L_Base # push eip\r
L_Base:\r
popw %bp # ebp <- offset L_Base\r
- addr16 pushl 36(%si)\r
- .byte 0x36\r
+ .byte 0x67; # address size override\r
+ push 54(%esp)\r
lea 0xc(%esi), %eax\r
push %eax\r
lret\r
GdtEnd:\r
\r
#\r
-# @param RegSet Pointer to a IA32_DWORD_REGS structure\r
-# @param Transition Pointer to the transition code\r
+# @param RegSet The pointer to a IA32_DWORD_REGS structure\r
+# @param Transition The pointer to the transition code\r
# @return The address of the 16-bit stack after returning from user code\r
#\r
-_InternalAsmThunk16:\r
+ASM_PFX(InternalAsmThunk16):\r
push %ebp\r
push %ebx\r
push %esi\r
popfl\r
lidtl 0x24(%esp)\r
lea 0xffffffcc(%ebp), %eax\r
- pop %gs\r
- pop %fs\r
- pop %es\r
- pop %ds\r
- pop %edi\r
- pop %esi\r
- pop %ebx\r
- pop %ebp\r
+ pop %gs\r
+ pop %fs\r
+ pop %es\r
+ pop %ds\r
+ pop %edi\r
+ pop %esi\r
+ pop %ebx\r
+ pop %ebp\r
ret\r
\r
.const:\r
\r
-_m16Size: .word _InternalAsmThunk16 - _m16Start\r
-_mThunk16Attr: .word _ThunkAttr - _m16Start\r
-_m16Gdt: .word _NullSegDesc - _m16Start\r
-_m16GdtrBase: .word _16GdtrBase - _m16Start\r
-_mTransition: .word _EntryPoint - _m16Start\r
+ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)\r
+ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)\r
+ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)\r
+ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)\r
+ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)\r