#------------------------------------------------------------------------------\r
#\r
-# Copyright (c) 2006 - 2009, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
+# http://opensource.org/licenses/bsd-license.php.\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
ASM_GLOBAL ASM_PFX(InternalAsmThunk16)\r
\r
# define the structure of IA32_REGS\r
-.equ _EDI, 0 #size 4\r
-.equ _ESI, 4 #size 4\r
-.equ _EBP, 8 #size 4\r
-.equ _ESP, 12 #size 4\r
-.equ _EBX, 16 #size 4\r
-.equ _EDX, 20 #size 4\r
-.equ _ECX, 24 #size 4\r
-.equ _EAX, 28 #size 4\r
-.equ _DS, 32 #size 2\r
-.equ _ES, 34 #size 2\r
-.equ _FS, 36 #size 2\r
-.equ _GS, 38 #size 2\r
-.equ _EFLAGS, 40 #size 8\r
-.equ _EIP, 48 #size 4\r
-.equ _CS, 52 #size 2\r
-.equ _SS, 54 #size 2\r
-.equ IA32_REGS_SIZE, 56\r
+.set _EDI, 0 #size 4\r
+.set _ESI, 4 #size 4\r
+.set _EBP, 8 #size 4\r
+.set _ESP, 12 #size 4\r
+.set _EBX, 16 #size 4\r
+.set _EDX, 20 #size 4\r
+.set _ECX, 24 #size 4\r
+.set _EAX, 28 #size 4\r
+.set _DS, 32 #size 2\r
+.set _ES, 34 #size 2\r
+.set _FS, 36 #size 2\r
+.set _GS, 38 #size 2\r
+.set _EFLAGS, 40 #size 8\r
+.set _EIP, 48 #size 4\r
+.set _CS, 52 #size 2\r
+.set _SS, 54 #size 2\r
+.set IA32_REGS_SIZE, 56\r
\r
.data\r
\r
orb $2,%al\r
outb %al, $0x92 # deactivate A20M#\r
L_2: \r
- movl %ss,%eax\r
+ movw %ss,%ax\r
lea IA32_REGS_SIZE(%esp), %bp\r
#\r
# rsi in the following 2 instructions is indeed bp in 16-bit code\r
movl $0xc0000080,%ecx\r
movq %rax, %cr0\r
rdmsr\r
- andb $0b11111110, %ah \r
+ andb $0xfe, %ah # $0b11111110\r
wrmsr\r
movq %rbp, %cr4\r
movl %esi,%ss # set up 16-bit stack segment\r
.byte 0x66 # make the following retf 32-bit\r
lret # transfer control to user code\r
\r
-.equ CODE16, ASM_PFX(_16Code) - .\r
-.equ DATA16, ASM_PFX(_16Data) - .\r
-.equ DATA32, ASM_PFX(_32Data) - .\r
+.set CODE16, ASM_PFX(_16Code) - .\r
+.set DATA16, ASM_PFX(_16Data) - .\r
+.set DATA32, ASM_PFX(_32Data) - .\r
\r
ASM_PFX(NullSeg): .quad 0\r
ASM_PFX(_16Code):\r
.byte 0xcf # 16-bit segment, 4GB limit\r
.byte 0\r
\r
-.equ GDT_SIZE, . - ASM_PFX(NullSeg)\r
+.set GDT_SIZE, . - ASM_PFX(NullSeg)\r
\r
#------------------------------------------------------------------------------\r
# IA32_REGISTER_SET *\r
pushq %rsi\r
pushq %rdi\r
\r
- movq %ds, %rbx\r
+ movl %ds, %ebx\r
pushq %rbx # Save ds segment register on the stack\r
- movq %es, %rbx\r
+ movl %es, %ebx\r
pushq %rbx # Save es segment register on the stack\r
- movq %ss, %rbx\r
+ movl %ss, %ebx\r
pushq %rbx # Save ss segment register on the stack\r
\r
.byte 0x0f, 0xa0 #push fs\r
movl %edx,%eax # eax <- transition code address\r
andl $0xf,%edx\r
shll $12,%eax # segment address in high order 16 bits\r
- lea (_BackFromUserCode - ASM_PFX(m16Start))(%rdx), %ax\r
+ lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%rdx), %ax\r
stosl # [edi] <- return address of user code\r
- sgdt (SavedGdt - SavedCr4)(%rcx) \r
+ sgdt 0x60(%rsp) # save GDT stack in argument space\r
+ movzwq 0x60(%rsp), %r10 # r10 <- GDT limit \r
+ lea ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11 \r
+ andq $0xfffffffffffffff0, %r11 # r11 <- 16-byte aligned shadowed GDT table in real mode buffer \r
+ \r
+ movw %r10w, (SavedGdt - SavedCr4)(%rcx) # save the limit of shadowed GDT table\r
+ movq %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx) # save the base address of shadowed GDT table\r
+ \r
+ movq 0x62(%rsp) ,%rsi # rsi <- the original GDT base address\r
+ xchg %r10, %rcx # save rcx to r10 and initialize rcx to be the limit of GDT table \r
+ incq %rcx # rcx <- the size of memory to copy\r
+ xchg %r11, %rdi # save rdi to r11 and initialize rdi to the base address of shadowed GDT table\r
+ rep\r
+ movsb # perform memory copy to shadow GDT table\r
+ movq %r10, %rcx # restore the orignal rcx before memory copy\r
+ movq %r11, %rdi # restore the original rdi before memory copy\r
+ \r
sidt 0x50(%rsp)\r
movq %cr0, %rax\r
movl %eax, (SavedCr0 - SavedCr4)(%rcx)\r
movl %edx,%ss\r
pushfq\r
lea -8(%rdx), %edx\r
- lea L_RetFromRealMode, %r8\r
+ lea L_RetFromRealMode(%rip), %r8\r
pushq %r8\r
movl %cs, %r8d\r
movw %r8w, (SavedCs - SavedCr4)(%rcx)\r
.byte _EntryPoint - SavedCr4\r
L_RetFromRealMode: \r
popfq\r
- lidt 0x50(%rsp)\r
+ lgdt 0x60(%rsp) # restore protected mode GDTR\r
+ lidt 0x50(%rsp) # restore protected mode IDTR\r
lea -IA32_REGS_SIZE(%rbp), %eax\r
.byte 0x0f, 0xa9 # pop gs\r
.byte 0x0f, 0xa1 # pop fs\r
\r
popq %rbx\r
- movq %rbx, %ss\r
+ movl %ebx, %ss\r
popq %rbx\r
- movq %rbx, %es\r
+ movl %ebx, %es\r
popq %rbx\r
- movq %rbx, %ds\r
+ movl %ebx, %ds\r
\r
popq %rdi\r
popq %rsi\r
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