Fix the bug that if code is run above 4G, AsmDisablePaging64 will be failure.

[mirror_edk2.git] / MdePkg / Library / UefiPciSegmentLibPciRootBridgeIo / PciSegmentLib.c

diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
index beb8b64adfd11146c80a970d099073907395ba68..da153f994a09b3eec2c936b129dab6c67a524490 100644 (file)
--- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
+++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
@@ -1,7 +1,7 @@
 /** @file\r
   PCI Segment Library implementation using PCI Root Bridge I/O Protocol.\r
 \r
-  Copyright (c) 2007 - 2008, Intel Corporation All rights\r
+  Copyright (c) 2007 - 2009, Intel Corporation All rights\r
   reserved. This program and the accompanying materials are\r
   licensed and made available under the terms and conditions of\r
   the BSD License which accompanies this distribution.  The full\r
@@ -244,7 +244,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
   Register a PCI device so PCI configuration registers may be accessed after \r
   SetVirtualAddressMap().\r
   \r
-  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
@@ -264,6 +264,7 @@ PciSegmentRegisterForRuntimeAccess (
   IN UINTN  Address\r
   )\r
 {\r
+  ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);\r
   return RETURN_UNSUPPORTED;\r
 }\r
 \r
@@ -297,7 +298,7 @@ PciSegmentRead8 (
   Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r
   \r
-  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address     Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  Value       The value to write.\r
@@ -1287,7 +1288,7 @@ PciSegmentBitFieldAndThenOr32 (
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
-  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If any reserved bits in StartAddress are set, then ASSERT().\r
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
@@ -1337,7 +1338,7 @@ PciSegmentReadBuffer (
     //\r
     // Read a word if StartAddress is word aligned\r
     //\r
-    *(volatile UINT16 *)Buffer = PciSegmentRead16 (StartAddress);\r
+    WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1347,7 +1348,7 @@ PciSegmentReadBuffer (
     //\r
     // Read as many double words as possible\r
     //\r
-    *(volatile UINT32 *)Buffer = PciSegmentRead32 (StartAddress);\r
+    WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress));\r
     StartAddress += sizeof (UINT32);\r
     Size -= sizeof (UINT32);\r
     Buffer = (UINT32*)Buffer + 1;\r
@@ -1357,7 +1358,7 @@ PciSegmentReadBuffer (
     //\r
     // Read the last remaining word if exist\r
     //\r
-    *(volatile UINT16 *)Buffer = PciSegmentRead16 (StartAddress);\r
+    WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1385,7 +1386,7 @@ PciSegmentReadBuffer (
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r
-  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If any reserved bits in StartAddress are set, then ASSERT().\r
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
@@ -1435,7 +1436,7 @@ PciSegmentWriteBuffer (
     //\r
     // Write a word if StartAddress is word aligned\r
     //\r
-    PciSegmentWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1445,7 +1446,7 @@ PciSegmentWriteBuffer (
     //\r
     // Write as many double words as possible\r
     //\r
-    PciSegmentWrite32 (StartAddress, *(UINT32*)Buffer);\r
+    PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer));\r
     StartAddress += sizeof (UINT32);\r
     Size -= sizeof (UINT32);\r
     Buffer = (UINT32*)Buffer + 1;\r
@@ -1455,7 +1456,7 @@ PciSegmentWriteBuffer (
     //\r
     // Write the last remaining word if exist\r
     //\r
-    PciSegmentWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r