#\r
RegisterFilterLib|Include/Library/RegisterFilterLib.h\r
\r
+[LibraryClasses.IA32, LibraryClasses.X64, LibraryClasses.AARCH64]\r
+ ## @libraryclass Provides services to generate random number.\r
+ #\r
+ RngLib|Include/Library/RngLib.h\r
+\r
[LibraryClasses.IA32, LibraryClasses.X64]\r
## @libraryclass Abstracts both S/W SMI generation and detection.\r
##\r
#\r
SmmPeriodicSmiLib|Include/Library/SmmPeriodicSmiLib.h\r
\r
- ## @libraryclass Provides services to generate random number.\r
- #\r
- RngLib|Include/Library/RngLib.h\r
-\r
## @libraryclass Provides services to log the SMI handler registration.\r
SmiHandlerProfileLib|Include/Library/SmiHandlerProfileLib.h\r
\r
#\r
gTianoCustomDecompressGuid = { 0xA31280AD, 0x481E, 0x41B6, { 0x95, 0xE8, 0x12, 0x7F, 0x4C, 0x98, 0x47, 0x79 }}\r
\r
+ #\r
+ # GUID used to provide initrd to linux via LoadFile2 protocol\r
+ #\r
+ gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}\r
+\r
+ ## Include/Protocol/CcMeasurement.h\r
+ gEfiCcFinalEventsTableGuid = { 0xdd4a4648, 0x2de7, 0x4665, { 0x96, 0x4d, 0x21, 0xd9, 0xef, 0x5f, 0xb4, 0x46 }}\r
+\r
[Guids.IA32, Guids.X64]\r
## Include/Guid/Cper.h\r
gEfiIa32X64ErrorTypeCacheCheckGuid = { 0xA55701F5, 0xE3EF, 0x43de, { 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C }}\r
## Include/Ppi/MmControl.h\r
gEfiPeiMmControlPpiGuid = { 0x61c68702, 0x4d7e, 0x4f43, { 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }}\r
\r
+ ## Include/Ppi/MmConfiguration.h\r
+ gEfiPeiMmConfigurationPpi = { 0xc109319, 0xc149, 0x450e, { 0xa3, 0xe3, 0xb9, 0xba, 0xdd, 0x9d, 0xc3, 0xa4 } }\r
+\r
+ ## Include/Ppi/MmCommunication.h\r
+ gEfiPeiMmCommunicationPpiGuid = { 0xae933e1c, 0xcc47, 0x4e38, { 0x8f, 0xe, 0xe2, 0xf6, 0x1d, 0x26, 0x5, 0xdf } }\r
+\r
#\r
# PPIs defined in PI 1.7.\r
#\r
## Include/Protocol/PcdInfo.h\r
gGetPcdInfoProtocolGuid = { 0x5be40f57, 0xfa68, 0x4610, { 0xbb, 0xbf, 0xe9, 0xc5, 0xfc, 0xda, 0xd3, 0x65 } }\r
\r
+ ## Include/Protocol/CcMeasurement.h\r
+ gEfiCcMeasurementProtocolGuid = { 0x96751a3d, 0x72f4, 0x41a6, { 0xa7, 0x94, 0xed, 0x5d, 0x0e, 0x67, 0xae, 0x6b }}\r
+\r
#\r
# Protocols defined in PI1.0.\r
#\r
# @Prompt PCI Express Base Address.\r
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000|UINT64|0x0000000a\r
\r
+ ## This value is used to set the base address of PCI MMIO window that provides I/O access.\r
+ # @Prompt PCI I/O Memory Map Window Base Address.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000040\r
+\r
+ ## This value is used for the 32-bit PCI memory map I/O base address translation.\r
+ # @Prompt 32-bit PCI Memory Map I/O Base Address translation.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000041\r
+\r
+ ## This value is used for the 64-bit PCI memory map I/O base address translation.\r
+ # @Prompt 64-bit PCI Memory Map I/O Base Address translation.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000042\r
+\r
## This value is used to set the size of PCI express hierarchy. The default is 256 MB.\r
# @Prompt PCI Express Base Size.\r
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x10000000|UINT64|0x0000000f\r
# @Prompt FSB Clock.\r
gEfiMdePkgTokenSpaceGuid.PcdFSBClock|200000000|UINT32|0x0000000c\r
\r
+ ## This dynamic PCD indicates the memory encryption attribute of the guest.\r
+ # @Prompt Memory encryption attribute\r
+ gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr|0|UINT64|0x0000002e\r
+\r
[UserExtensions.TianoCore."ExtraFiles"]\r
MdePkgExtra.uni\r