--- /dev/null
+/** @file\r
+ Driver implementing the Tiano Legacy 8259 Protocol\r
+\r
+Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef _8259_H__\r
+#define _8259_H__\r
+\r
+#include <FrameworkDxe.h>\r
+\r
+#include <Protocol/Legacy8259.h>\r
+#include <Protocol/PciIo.h>\r
+\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#include <IndustryStandard/Pci.h>\r
+\r
+// 8259 Hardware definitions\r
+\r
+#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08\r
+#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70\r
+\r
+#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68\r
+#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70\r
+\r
+#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20\r
+#define LEGACY_8259_MASK_REGISTER_MASTER 0x21\r
+#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0\r
+#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1\r
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0\r
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1\r
+\r
+#define LEGACY_8259_EOI 0x20\r
+\r
+// Protocol Function Prototypes\r
+\r
+/**\r
+ Sets the base address for the 8259 master and slave PICs.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.\r
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.\r
+\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetVectorBase (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN UINT8 MasterBase,\r
+ IN UINT8 SlaveBase\r
+ );\r
+\r
+/**\r
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
+\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259GetMask (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ OUT UINT16 *LegacyMask, OPTIONAL\r
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r
+ OUT UINT16 *ProtectedMask, OPTIONAL\r
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r
+ );\r
+\r
+/**\r
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
+\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetMask (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN UINT16 *LegacyMask, OPTIONAL\r
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
+ IN UINT16 *ProtectedMask, OPTIONAL\r
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
+ );\r
+\r
+/**\r
+ Sets the mode of the PICs.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Mode 16-bit real or 32-bit protected mode.\r
+ @param[in] Mask The value with which to set the interrupt mask.\r
+ @param[in] EdgeLevel The value with which to set the edge/level mask.\r
+\r
+ @retval EFI_SUCCESS The mode was set successfully.\r
+ @retval EFI_INVALID_PARAMETER The mode was not set.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetMode (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_MODE Mode,\r
+ IN UINT16 *Mask, OPTIONAL\r
+ IN UINT16 *EdgeLevel OPTIONAL\r
+ );\r
+\r
+/**\r
+ Translates the IRQ into a vector.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
+ @param[out] Vector The vector that is assigned to the IRQ.\r
+\r
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.\r
+ @retval EFI_INVALID_PARAMETER Irq is not valid.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259GetVector (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq,\r
+ OUT UINT8 *Vector\r
+ );\r
+\r
+/**\r
+ Enables the specified IRQ.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.\r
+\r
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259EnableIrq (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq,\r
+ IN BOOLEAN LevelTriggered\r
+ );\r
+\r
+/**\r
+ Disables the specified IRQ.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
+\r
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259DisableIrq (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq\r
+ );\r
+\r
+/**\r
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] PciHandle PCI function for which to return the vector.\r
+ @param[out] Vector IRQ number that corresponds to the interrupt line.\r
+\r
+ @retval EFI_SUCCESS The interrupt line value was read successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259GetInterruptLine (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ OUT UINT8 *Vector\r
+ );\r
+\r
+/**\r
+ Issues the End of Interrupt (EOI) commands to PICs.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq The interrupt for which to issue the EOI command.\r
+\r
+ @retval EFI_SUCCESS The EOI command was issued.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259EndOfInterrupt (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq\r
+ );\r
+\r
+#endif\r
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