UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / OvmfPkg / AcpiTables / Facp.aslc

diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc
deleted file mode 100644 (file)
index 78b7ac6..0000000
--- a/OvmfPkg/AcpiTables/Facp.aslc
+++ /dev/null
@@ -1,79 +0,0 @@
-/** @file\r
-  FACP Table\r
-  \r
-  Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials are\r
-  licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-  \r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/ \r
- \r
-#include "Platform.h"\r
-\r
-EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {\r
-  EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,\r
-  sizeof (EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE),\r
-  EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,\r
-  0,                // to make sum of entire table == 0\r
-  EFI_ACPI_OEM_ID,         // OEMID is a 6 bytes long field\r
-  EFI_ACPI_OEM_TABLE_ID,      // OEM table identification(8 bytes long)\r
-  EFI_ACPI_OEM_REVISION,      // OEM revision number\r
-  EFI_ACPI_CREATOR_ID,        // ASL compiler vendor ID\r
-  EFI_ACPI_CREATOR_REVISION,  // ASL compiler revision number\r
-  0,                // Physical addesss of FACS\r
-  0,                // Physical address of DSDT\r
-  INT_MODEL,        // System Interrupt Model\r
-  RESERVED,         // reserved\r
-  SCI_INT_VECTOR,   // System vector of SCI interrupt\r
-  SMI_CMD_IO_PORT,  // Port address of SMI command port\r
-  ACPI_ENABLE,      // value to write to port smi_cmd to enable ACPI\r
-  ACPI_DISABLE,     // value to write to port smi_cmd to disable ACPI\r
-  S4BIOS_REQ,       // Value to write to SMI CMD port to enter the S4BIOS state\r
-  0xE2,             // PState control\r
-  PM1a_EVT_BLK,     // Port address of Power Mgt 1a Event Reg Blk\r
-  PM1b_EVT_BLK,     // Port address of Power Mgt 1b Event Reg Blk\r
-  PM1a_CNT_BLK,     // Port address of Power Mgt 1a Ctrl Reg Blk\r
-  PM1b_CNT_BLK,     // Port address of Power Mgt 1b Ctrl Reg Blk\r
-  PM2_CNT_BLK,      // Port address of Power Mgt 2  Ctrl Reg Blk\r
-  PM_TMR_BLK,       // Port address of Power Mgt Timer Ctrl Reg Blk\r
-  GPE0_BLK,         // Port addr of General Purpose Event 0 Reg Blk\r
-  GPE1_BLK,         // Port addr of General Purpose Event 1 Reg Blk\r
-  PM1_EVT_LEN,      // Byte Length of ports at pm1X_evt_blk\r
-  PM1_CNT_LEN,      // Byte Length of ports at pm1X_cnt_blk\r
-  PM2_CNT_LEN,      // Byte Length of ports at pm2_cnt_blk\r
-  PM_TM_LEN,        // Byte Length of ports at pm_tm_blk\r
-  GPE0_BLK_LEN,     // Byte Length of ports at gpe0_blk\r
-  GPE1_BLK_LEN,     // Byte Length of ports at gpe1_blk\r
-  GPE1_BASE,        // offset in gpe model where gpe1 events start\r
-  0xE3,             // _CST support\r
-  P_LVL2_LAT,       // worst case HW latency to enter/exit C2 state\r
-  P_LVL3_LAT,       // worst case HW latency to enter/exit C3 state\r
-  FLUSH_SIZE,       // Size of area read to flush caches\r
-  FLUSH_STRIDE,     // Stride used in flushing caches\r
-  DUTY_OFFSET,      // bit location of duty cycle field in p_cnt reg\r
-  DUTY_WIDTH,       // bit width of duty cycle field in p_cnt reg\r
-  DAY_ALRM,         // index to day-of-month alarm in RTC CMOS RAM\r
-  MON_ALRM,         // index to month-of-year alarm in RTC CMOS RAM\r
-  CENTURY,          // index to century in RTC CMOS RAM\r
-  0x03,             // Boot architecture flag\r
-  0x00,             // Boot architecture flag\r
-  RESERVED,         // reserved \r
-  FLAG\r
-};\r
-\r
-\r
-VOID*\r
-ReferenceAcpiTable (\r
-  VOID\r
-  )\r
-{\r
-  //\r
-  // Reference the table being generated to prevent the optimizer from removing the \r
-  // data structure from the exeutable\r
-  //\r
-  return (VOID*)&FACP;\r
-}\r