OvmfPkg: Add CsmSupportLib

[mirror_edk2.git] / OvmfPkg / Csm / CsmSupportLib / LegacyInterrupt.h

diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
new file mode 100644 (file)
index 0000000..193e48b
--- /dev/null
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
@@ -0,0 +1,119 @@
+/** @file\r
+  Legacy Region Support\r
+\r
+  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials are\r
+  licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _LEGACY_INTERRUPT_H_\r
+#define _LEGACY_INTERRUPT_H_\r
+\r
+#include <PiDxe.h>\r
+\r
+#include <Protocol/LegacyInterrupt.h>\r
+\r
+#include <Library/PciLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+\r
+#define LEGACY_INT_BUS  0\r
+#define LEGACY_INT_DEV  1\r
+#define LEGACY_INT_FUNC 0\r
+\r
+#define PIRQN           0x00  // PIRQ Null\r
+#define PIRQA           0x60\r
+#define PIRQB           0x61\r
+#define PIRQC           0x62\r
+#define PIRQD           0x63\r
+#define PIRQE           0x68\r
+#define PIRQF           0x69\r
+#define PIRQG           0x6A\r
+#define PIRQH           0x6B\r
+\r
+#define MAX_PIRQ_NUMBER 8\r
+\r
+/**\r
+  Return the number of PIRQs supported by this chipset.\r
+\r
+  @param[in]  This         Pointer to LegacyInterrupt Protocol\r
+  @param[out] NumberPirqs  The pointer to return the max IRQ number supported\r
+\r
+  @retval EFI_SUCCESS   Max PIRQs successfully returned\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+GetNumberPirqs (\r
+  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
+  OUT UINT8                          *NumberPirqs\r
+  );\r
+\r
+/**\r
+  Return PCI location of this device.\r
+  $PIR table requires this info.\r
+\r
+  @param[in]   This                - Protocol instance pointer.\r
+  @param[out]  Bus                 - PCI Bus\r
+  @param[out]  Device              - PCI Device\r
+  @param[out]  Function            - PCI Function\r
+\r
+  @retval  EFI_SUCCESS   Bus/Device/Function returned\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+GetLocation (\r
+  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
+  OUT UINT8                          *Bus,\r
+  OUT UINT8                          *Device,\r
+  OUT UINT8                          *Function\r
+  );\r
+\r
+/**\r
+  Read the given PIRQ register\r
+\r
+  @param[in]  This        Protocol instance pointer\r
+  @param[in]  PirqNumber  The Pirq register 0 = A, 1 = B etc\r
+  @param[out] PirqData    Value read\r
+\r
+  @retval EFI_SUCCESS   Decoding change affected.\r
+  @retval EFI_INVALID_PARAMETER   Invalid PIRQ number\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ReadPirq (\r
+  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
+  IN  UINT8                          PirqNumber,\r
+  OUT UINT8                          *PirqData\r
+  );\r
+\r
+/**\r
+  Write the given PIRQ register\r
+\r
+  @param[in]  This        Protocol instance pointer\r
+  @param[in]  PirqNumber  The Pirq register 0 = A, 1 = B etc\r
+  @param[out] PirqData    Value to write\r
+\r
+  @retval EFI_SUCCESS   Decoding change affected.\r
+  @retval EFI_INVALID_PARAMETER   Invalid PIRQ number\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+WritePirq (\r
+  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
+  IN  UINT8                          PirqNumber,\r
+  IN  UINT8                          PirqData\r
+  );\r
+\r
+#endif\r
+\r