// Device offsets and constants\r
//\r
\r
-#define LSI_LOGIC_PCI_VENDOR_ID 0x1000\r
-#define LSI_53C1030_PCI_DEVICE_ID 0x0030\r
-#define LSI_SAS1068_PCI_DEVICE_ID 0x0054\r
-#define LSI_SAS1068E_PCI_DEVICE_ID 0x0058\r
+#define LSI_LOGIC_PCI_VENDOR_ID 0x1000\r
+#define LSI_53C1030_PCI_DEVICE_ID 0x0030\r
+#define LSI_SAS1068_PCI_DEVICE_ID 0x0054\r
+#define LSI_SAS1068E_PCI_DEVICE_ID 0x0058\r
\r
-#define MPT_REG_DOORBELL 0x00\r
-#define MPT_REG_WRITE_SEQ 0x04\r
-#define MPT_REG_HOST_DIAG 0x08\r
-#define MPT_REG_TEST 0x0c\r
-#define MPT_REG_DIAG_DATA 0x10\r
-#define MPT_REG_DIAG_ADDR 0x14\r
-#define MPT_REG_ISTATUS 0x30\r
-#define MPT_REG_IMASK 0x34\r
-#define MPT_REG_REQ_Q 0x40\r
-#define MPT_REG_REP_Q 0x44\r
+#define MPT_REG_DOORBELL 0x00\r
+#define MPT_REG_WRITE_SEQ 0x04\r
+#define MPT_REG_HOST_DIAG 0x08\r
+#define MPT_REG_TEST 0x0c\r
+#define MPT_REG_DIAG_DATA 0x10\r
+#define MPT_REG_DIAG_ADDR 0x14\r
+#define MPT_REG_ISTATUS 0x30\r
+#define MPT_REG_IMASK 0x34\r
+#define MPT_REG_REQ_Q 0x40\r
+#define MPT_REG_REP_Q 0x44\r
\r
-#define MPT_DOORBELL_RESET 0x40\r
-#define MPT_DOORBELL_HANDSHAKE 0x42\r
+#define MPT_DOORBELL_RESET 0x40\r
+#define MPT_DOORBELL_HANDSHAKE 0x42\r
\r
-#define MPT_IMASK_DOORBELL 0x01\r
-#define MPT_IMASK_REPLY 0x08\r
+#define MPT_IMASK_DOORBELL 0x01\r
+#define MPT_IMASK_REPLY 0x08\r
\r
-#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST 0x00\r
-#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT 0x02\r
+#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST 0x00\r
+#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT 0x02\r
\r
-#define MPT_SG_ENTRY_TYPE_SIMPLE 0x01\r
+#define MPT_SG_ENTRY_TYPE_SIMPLE 0x01\r
\r
-#define MPT_IOC_WHOINIT_ROM_BIOS 0x02\r
+#define MPT_IOC_WHOINIT_ROM_BIOS 0x02\r
\r
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x00 << 24)\r
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x01 << 24)\r
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x02 << 24)\r
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x00 << 24)\r
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x01 << 24)\r
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x02 << 24)\r
\r
-#define MPT_SCSI_IOCSTATUS_SUCCESS 0x0000\r
-#define MPT_SCSI_IOCSTATUS_DEVICE_NOT_THERE 0x0043\r
-#define MPT_SCSI_IOCSTATUS_DATA_OVERRUN 0x0044\r
-#define MPT_SCSI_IOCSTATUS_DATA_UNDERRUN 0x0045\r
+#define MPT_SCSI_IOCSTATUS_SUCCESS 0x0000\r
+#define MPT_SCSI_IOCSTATUS_DEVICE_NOT_THERE 0x0043\r
+#define MPT_SCSI_IOCSTATUS_DATA_OVERRUN 0x0044\r
+#define MPT_SCSI_IOCSTATUS_DATA_UNDERRUN 0x0045\r
\r
//\r
// Device structures\r
} MPT_SCSI_IO_REQUEST;\r
\r
typedef struct {\r
- UINT32 Length: 24;\r
- UINT32 EndOfList: 1;\r
- UINT32 Is64BitAddress: 1;\r
+ UINT32 Length : 24;\r
+ UINT32 EndOfList : 1;\r
+ UINT32 Is64BitAddress : 1;\r
//\r
// True when the buffer contains data to be transfered. Otherwise it's the\r
// destination buffer\r
//\r
- UINT32 BufferContainsData: 1;\r
- UINT32 LocalAddress: 1;\r
- UINT32 ElementType: 2;\r
- UINT32 EndOfBuffer: 1;\r
- UINT32 LastElement: 1;\r
+ UINT32 BufferContainsData : 1;\r
+ UINT32 LocalAddress : 1;\r
+ UINT32 ElementType : 2;\r
+ UINT32 EndOfBuffer : 1;\r
+ UINT32 LastElement : 1;\r
UINT64 DataBufferAddress;\r
} MPT_SG_ENTRY_SIMPLE;\r
\r
} MPT_SCSI_IO_REPLY;\r
\r
typedef struct {\r
- MPT_SCSI_IO_REQUEST Header;\r
- MPT_SG_ENTRY_SIMPLE Sg;\r
+ MPT_SCSI_IO_REQUEST Header;\r
+ MPT_SG_ENTRY_SIMPLE Sg;\r
} MPT_SCSI_REQUEST_WITH_SG;\r
#pragma pack ()\r
\r
typedef union {\r
- MPT_SCSI_IO_REPLY Data;\r
- UINT64 Uint64; // 8 byte alignment required by HW\r
+ MPT_SCSI_IO_REPLY Data;\r
+ UINT64 Uint64; // 8 byte alignment required by HW\r
} MPT_SCSI_IO_REPLY_ALIGNED;\r
\r
typedef union {\r
- MPT_SCSI_REQUEST_WITH_SG Data;\r
- UINT64 Uint64; // 8 byte alignment required by HW\r
+ MPT_SCSI_REQUEST_WITH_SG Data;\r
+ UINT64 Uint64; // 8 byte alignment required by HW\r
} MPT_SCSI_REQUEST_ALIGNED;\r
\r
#endif // __FUSION_MPT_SCSI_H__\r