OvmfPkg/QemuBootOrderLib: adapt Q35 SATA PMPN to UEFI spec Mantis 1353

[mirror_edk2.git] / OvmfPkg / Library / QemuBootOrderLib / QemuBootOrderLib.c

diff --git a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
index 43dbaffaa421747a931acb4e2c1e2b07cfeebe60..582b0bc90ebc17b73a0fc5f04fea297a60177404 100644 (file)
--- a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
+++ b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
@@ -786,11 +786,11 @@ TranslatePciOfwNodes (
     //\r
     // UEFI device path:\r
     //\r
-    //   PciRoot(0x0)/Pci(0x1F,0x2)/Sata(0x1,0x0,0x0)\r
-    //                                   ^   ^   ^\r
-    //                                   |   |   LUN (always 0 on Q35)\r
+    //   PciRoot(0x0)/Pci(0x1F,0x2)/Sata(0x1,0xFFFF,0x0)\r
+    //                                   ^   ^      ^\r
+    //                                   |   |      LUN (always 0 on Q35)\r
     //                                   |   port multiplier port number,\r
-    //                                   |   always 0 on Q35\r
+    //                                   |   always 0xFFFF on Q35\r
     //                                   channel (port) number\r
     //\r
     UINT64 Channel;\r
@@ -805,7 +805,7 @@ TranslatePciOfwNodes (
     Written = UnicodeSPrintAsciiFormat (\r
       Translated,\r
       *TranslatedSize * sizeof (*Translated), // BufferSize in bytes\r
-      "PciRoot(0x%x)%s/Pci(0x%Lx,0x%Lx)/Sata(0x%Lx,0x0,0x0)",\r
+      "PciRoot(0x%x)%s/Pci(0x%Lx,0x%Lx)/Sata(0x%Lx,0xFFFF,0x0)",\r
       PciRoot,\r
       Bridges,\r
       PciDevFun[0],\r
@@ -931,6 +931,61 @@ TranslatePciOfwNodes (
       TargetLun[0],\r
       TargetLun[1]\r
       );\r
+  } else if (NumNodes >= FirstNonBridge + 2 &&\r
+      SubstringEq (OfwNode[FirstNonBridge + 0].DriverName, "pci8086,5845") &&\r
+      SubstringEq (OfwNode[FirstNonBridge + 1].DriverName, "namespace")\r
+      ) {\r
+    //\r
+    // OpenFirmware device path (NVMe device):\r
+    //\r
+    //   /pci@i0cf8/pci8086,5845@6[,1]/namespace@1,0\r
+    //        ^                  ^  ^            ^ ^\r
+    //        |                  |  |            | Extended Unique Identifier\r
+    //        |                  |  |            | (EUI-64), big endian interp.\r
+    //        |                  |  |            namespace ID\r
+    //        |                  PCI slot & function holding NVMe controller\r
+    //        PCI root at system bus port, PIO\r
+    //\r
+    // UEFI device path:\r
+    //\r
+    //   PciRoot(0x0)/Pci(0x6,0x1)/NVMe(0x1,00-00-00-00-00-00-00-00)\r
+    //                                  ^   ^\r
+    //                                  |   octets of the EUI-64\r
+    //                                  |   in address order\r
+    //                                  namespace ID\r
+    //\r
+    UINT64 Namespace[2];\r
+    UINTN  RequiredEntries;\r
+    UINT8  *Eui64;\r
+\r
+    RequiredEntries = sizeof (Namespace) / sizeof (Namespace[0]);\r
+    NumEntries = RequiredEntries;\r
+    if (ParseUnitAddressHexList (\r
+          OfwNode[FirstNonBridge + 1].UnitAddress,\r
+          Namespace,\r
+          &NumEntries\r
+          ) != RETURN_SUCCESS ||\r
+        NumEntries != RequiredEntries ||\r
+        Namespace[0] == 0 ||\r
+        Namespace[0] >= MAX_UINT32\r
+        ) {\r
+      return RETURN_UNSUPPORTED;\r
+    }\r
+\r
+    Eui64 = (UINT8 *)&Namespace[1];\r
+    Written = UnicodeSPrintAsciiFormat (\r
+      Translated,\r
+      *TranslatedSize * sizeof (*Translated), // BufferSize in bytes\r
+      "PciRoot(0x%x)%s/Pci(0x%Lx,0x%Lx)/"\r
+      "NVMe(0x%Lx,%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x)",\r
+      PciRoot,\r
+      Bridges,\r
+      PciDevFun[0],\r
+      PciDevFun[1],\r
+      Namespace[0],\r
+      Eui64[7], Eui64[6], Eui64[5], Eui64[4],\r
+      Eui64[3], Eui64[2], Eui64[1], Eui64[0]\r
+      );\r
   } else {\r
     //\r
     // Generic OpenFirmware device path for PCI devices:\r