\r
//\r
// Per-CPU data mapping structure\r
+// Use UINT32 for cached indicators and compare to a specific value\r
+// so that the hypervisor can't indicate a value is cached by just\r
+// writing random data to that area.\r
//\r
typedef struct {\r
- BOOLEAN Dr7Cached;\r
- UINT64 Dr7;\r
+ UINT32 Dr7Cached;\r
+ UINT64 Dr7;\r
} SEV_ES_PER_CPU_DATA;\r
\r
\r
}\r
\r
SevEsData->Dr7 = *Register;\r
- SevEsData->Dr7Cached = TRUE;\r
+ SevEsData->Dr7Cached = 1;\r
\r
return 0;\r
}\r
// If there is a cached valued for DR7, return that. Otherwise return the\r
// DR7 standard reset value of 0x400 (no debug breakpoints set).\r
//\r
- *Register = (SevEsData->Dr7Cached) ? SevEsData->Dr7 : 0x400;\r
+ *Register = (SevEsData->Dr7Cached == 1) ? SevEsData->Dr7 : 0x400;\r
\r
return 0;\r
}\r