OvmfPkg: Add MpInitLibDepLib related PPI/Protocol definitions

[mirror_edk2.git] / OvmfPkg / OvmfPkg.dec

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 340d83f794d06c69bd5094068cfda16681a560c4..8c2048051bea2887035bee33c01036b9ca682b96 100644 (file)
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -34,6 +34,10 @@
   #                  Virtualization (SEV) guests.\r
   MemEncryptSevLib|Include/Library/MemEncryptSevLib.h\r
 \r
+  ##  @libraryclass  Declares helper functions for TDX guests.\r
+  #\r
+  MemEncryptTdxLib|Include/Library/MemEncryptTdxLib.h\r
+\r
   ##  @libraryclass  Save and restore variables using a file\r
   #\r
   NvVarsFileLib|Include/Library/NvVarsFileLib.h\r
@@ -109,6 +113,18 @@
   #\r
   XenPlatformLib|Include/Library/XenPlatformLib.h\r
 \r
+  ##  @libraryclass  TdxMailboxLib\r
+  #\r
+  TdxMailboxLib|Include/Library/TdxMailboxLib.h\r
+\r
+  ##  @libraryclass  PlatformInitLib\r
+  #\r
+  PlatformInitLib|Include/Library/PlatformInitLib.h\r
+\r
+  ##  @libraryclass  PeilessStartupLib\r
+  #\r
+  PeilessStartupLib|Include/Library/PeilessStartupLib.h\r
+\r
 [Guids]\r
   gUefiOvmfPkgTokenSpaceGuid            = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
   gEfiXenInfoGuid                       = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r
@@ -124,6 +140,8 @@
   gQemuKernelLoaderFsMediaGuid          = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}\r
   gGrubFileGuid                         = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}\r
   gConfidentialComputingSecretGuid      = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}\r
+  gConfidentialComputingSevSnpBlobGuid  = {0x067b1f5f, 0xcf26, 0x44c5, {0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42}}\r
+  gUefiOvmfPkgPlatformInfoGuid          = {0xdec9b486, 0x1f16, 0x47c7, {0x8f, 0x68, 0xdf, 0x1a, 0x41, 0x88, 0x8b, 0xa5}}\r
 \r
 [Ppis]\r
   # PPI whose presence in the PPI database signals that the TPM base address\r
@@ -134,6 +152,9 @@
   # the PEI phase, regardless of memory encryption\r
   gOvmfTpmMmioAccessiblePpiGuid         = {0x35c84ff2, 0x7bfe, 0x453d, {0x84, 0x5f, 0x68, 0x3a, 0x49, 0x2c, 0xf7, 0xb7}}\r
 \r
+  gEfiPeiMpInitLibMpDepPpiGuid          = {0x138f9cf4, 0xf0e7, 0x4721, { 0x8f, 0x49, 0xf5, 0xff, 0xec, 0xf4, 0x2d, 0x40}}\r
+  gEfiPeiMpInitLibUpDepPpiGuid          = {0xb590774, 0xbc67, 0x49f4, { 0xa7, 0xdb, 0xe8, 0x2e, 0x89, 0xe6, 0xb5, 0xd6}}\r
+\r
 [Protocols]\r
   gVirtioDeviceProtocolGuid             = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
   gXenBusProtocolGuid                   = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
@@ -148,6 +169,9 @@
   gEfiLegacyInterruptProtocolGuid       = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}\r
   gEfiVgaMiniPortProtocolGuid           = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}\r
   gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}\r
+  gQemuAcpiTableNotifyProtocolGuid      = {0x928939b2, 0x4235, 0x462f, {0x95, 0x80, 0xf6, 0xa2, 0xb2, 0xc2, 0x1a, 0x4f}}\r
+  gEfiMpInitLibMpDepProtocolGuid        = {0xbb00a5ca, 0x8ce,  0x462f, {0xa5, 0x37, 0x43, 0xc7, 0x4a, 0x82, 0x5c, 0xa4}}\r
+  gEfiMpInitLibUpDepProtocolGuid        = {0xa9e7cef1, 0x5682, 0x42cc, {0xb1, 0x23, 0x99, 0x30, 0x97, 0x3f, 0x4a, 0x9f}}\r
 \r
 [PcdsFixedAtBuild]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0\r
@@ -350,6 +374,27 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset|0|UINT32|0x56\r
   gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize|0|UINT32|0x57\r
 \r
+  ## The base address and size of the SEV-SNP Secrets Area that contains\r
+  #  the VM platform communication key used to send and recieve the\r
+  #  messages to the PSP. If this is set in the .fdf, the platform\r
+  #  is responsible to reserve this area from DXE phase overwrites.\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase|0|UINT32|0x58\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize|0|UINT32|0x59\r
+\r
+  ## The base address and size of a CPUID Area that contains the hypervisor\r
+  #  provided CPUID results. In the case of SEV-SNP, the CPUID results are\r
+  #  filtered by the SEV-SNP firmware. If this is set in the .fdf, the\r
+  #  platform is responsible to reserve this area from DXE phase overwrites.\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|0|UINT32|0x60\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize|0|UINT32|0x61\r
+\r
+  ## The range of memory that is validated by the SEC phase.\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedStart|0|UINT32|0x62\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd|0|UINT32|0x63\r
+\r
+  ## The Tdx accept page size. 0x1000(4k),0x200000(2M)\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize|0x200000|UINT32|0x65\r
+\r
 [PcdsDynamic, PcdsDynamicEx]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
@@ -389,6 +434,13 @@
   #  instance in PiSmmCpuDxeSmm, and CpuHotplugSmm.\r
   gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress|0|UINT64|0x46\r
 \r
+  ## This PCD tracks where PcdVideo{Horizontal,Vertical}Resolution\r
+  #  values are coming from.\r
+  #    0 - unset (defaults from platform dsc)\r
+  #    1 - set from PlatformConfig\r
+  #    2 - set by GOP Driver.\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdVideoResolutionSource|0|UINT8|0x64\r
+\r
 [PcdsFeatureFlag]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r