## @libraryclass Access bhyve's firmware control interface.\r
BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h\r
\r
+ ## @libraryclass Verify blobs read from the VMM\r
+ BlobVerifierLib|Include/Library/BlobVerifierLib.h\r
+\r
## @libraryclass Loads and boots a Linux kernel image\r
#\r
LoadLinuxLib|Include/Library/LoadLinuxLib.h\r
# access.\r
PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h\r
\r
+ ## @libraryclass Provide common utility functions to PciHostBridgeLib\r
+ # instances in ArmVirtPkg and OvmfPkg.\r
+ PciHostBridgeUtilityLib|Include/Library/PciHostBridgeUtilityLib.h\r
+\r
## @libraryclass Register a status code handler for printing the Boot\r
# Manager's LoadImage() and StartImage() preparations, and\r
# return codes, to the UEFI console.\r
gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}\r
gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}\r
gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}\r
- gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}\r
gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}\r
+ gGrubFileGuid = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}\r
+ gConfidentialComputingSecretGuid = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}\r
\r
[Ppis]\r
# PPI whose presence in the PPI database signals that the TPM base address\r
# has been discovered and recorded\r
gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}\r
\r
+ # This PPI signals that accessing the MMIO range of the TPM is possible in\r
+ # the PEI phase, regardless of memory encryption\r
+ gOvmfTpmMmioAccessiblePpiGuid = {0x35c84ff2, 0x7bfe, 0x453d, {0x84, 0x5f, 0x68, 0x3a, 0x49, 0x2c, 0xf7, 0xb7}}\r
+\r
[Protocols]\r
gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
## Number of page frames to use for storing grant table entries.\r
gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33\r
\r
+ ## Specify the extra page table needed to mark the GHCB as unencrypted.\r
+ # The value should be a multiple of 4KB for each.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f\r
+\r
+ ## The base address of the SEC GHCB page used by SEV-ES.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UINT32|0x44\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize|0|UINT32|0x45\r
+\r
+ ## The base address and size of the SEV Launch Secret Area provisioned\r
+ # after remote attestation. If this is set in the .fdf, the platform\r
+ # is responsible for protecting the area from DXE phase overwrites.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43\r
+\r
+ ## The base address and size of a hash table confirming allowed\r
+ # parameters to be passed in via the Qemu firmware configuration\r
+ # device\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48\r
+\r
+ ## The base address and size of the work area used during the SEC\r
+ # phase by the SEV and TDX supports.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|0|UINT32|0x49\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize|0|UINT32|0x50\r
+\r
+ ## The work area contains a fixed size header in the Include/WorkArea.h.\r
+ # The size of this header is used early boot, and is provided through\r
+ # a fixed PCD. It need to be kept in sync with any changes to the\r
+ # header definition.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51\r
+\r
+ ## The base address and size of the TDX Cfv base and size.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase|0|UINT32|0x52\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset|0|UINT32|0x53\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize|0|UINT32|0x54\r
+\r
+ ## The base address and size of the TDX Bfv base and size.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase|0|UINT32|0x55\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset|0|UINT32|0x56\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize|0|UINT32|0x57\r
+\r
+ ## The base address and size of the SEV-SNP Secrets Area that contains\r
+ # the VM platform communication key used to send and recieve the\r
+ # messages to the PSP. If this is set in the .fdf, the platform\r
+ # is responsible to reserve this area from DXE phase overwrites.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase|0|UINT32|0x58\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize|0|UINT32|0x59\r
+\r
+ ## The base address and size of a CPUID Area that contains the hypervisor\r
+ # provided CPUID results. In the case of SEV-SNP, the CPUID results are\r
+ # filtered by the SEV-SNP firmware. If this is set in the .fdf, the\r
+ # platform is responsible to reserve this area from DXE phase overwrites.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|0|UINT32|0x60\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize|0|UINT32|0x61\r
+\r
[PcdsDynamic, PcdsDynamicEx]\r
gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34\r
\r
+ ## This PCD adds a communication channel between OVMF's SmmCpuFeaturesLib\r
+ # instance in PiSmmCpuDxeSmm, and CpuHotplugSmm.\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress|0|UINT64|0x46\r
+\r
[PcdsFeatureFlag]\r
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r
projects / mirror_edk2.git / blobdiff