GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG\r
INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
MSFT:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
-!if $(TOOL_CHAIN_TAG) != "XCODE5"\r
+!if $(TOOL_CHAIN_TAG) != "XCODE5" && $(TOOL_CHAIN_TAG) != "CLANGPDB"\r
GCC:*_*_*_CC_FLAGS = -mno-mmx -mno-sse\r
!endif\r
!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
XCODE:*_*_*_DLINK_FLAGS =\r
+ CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
XCODE:*_*_*_DLINK_FLAGS =\r
+ CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
################################################################################\r
#\r
!if $(SMM_REQUIRE) == TRUE\r
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE\r
!endif\r
\r
[PcdsFixedAtBuild]\r