/** @file\r
The Header file of the Pci Host Bridge Driver\r
\r
+ Copyright (C) 2015, Red Hat, Inc.\r
Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials are licensed and made available\r
#include <Library/IoLib.h>\r
#include <Library/PciLib.h>\r
\r
-//\r
-// Hard code the host bridge number in the platform.\r
-// In this chipset, there is only one host bridge.\r
-//\r
-#define HOST_BRIDGE_NUMBER 1\r
-\r
#define MAX_PCI_DEVICE_NUMBER 31\r
#define MAX_PCI_FUNCTION_NUMBER 7\r
#define MAX_PCI_REG_ADDRESS 0xFF\r
typedef struct {\r
UINTN Signature;\r
EFI_HANDLE HostBridgeHandle;\r
- UINTN RootBridgeNumber;\r
LIST_ENTRY Head;\r
BOOLEAN ResourceSubmited;\r
BOOLEAN CanRestarted;\r
RES_STATUS Status;\r
} PCI_RES_NODE;\r
\r
+#pragma pack(1)\r
+typedef struct {\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesc[TypeMax];\r
+ EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;\r
+} RESOURCE_CONFIGURATION;\r
+#pragma pack()\r
+\r
#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32('e', '2', 'p', 'b')\r
\r
typedef struct {\r
UINT64 MemLimit;\r
UINT64 IoLimit;\r
\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;\r
\r
+ RESOURCE_CONFIGURATION ConfigBuffer;\r
} PCI_ROOT_BRIDGE_INSTANCE;\r
\r
\r