STATIC\r
UINT32\r
GetPeiMemoryCap (\r
- VOID\r
+ IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
BOOLEAN Page1GSupport;\r
}\r
}\r
\r
- if (mPlatformInfoHob.PhysMemAddressWidth <= 39) {\r
+ if (PlatformInfoHob->PhysMemAddressWidth <= 39) {\r
Pml4Entries = 1;\r
- PdpEntries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 30);\r
+ PdpEntries = 1 << (PlatformInfoHob->PhysMemAddressWidth - 30);\r
ASSERT (PdpEntries <= 0x200);\r
} else {\r
- if (mPlatformInfoHob.PhysMemAddressWidth > 48) {\r
+ if (PlatformInfoHob->PhysMemAddressWidth > 48) {\r
Pml4Entries = 0x200;\r
} else {\r
- Pml4Entries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 39);\r
+ Pml4Entries = 1 << (PlatformInfoHob->PhysMemAddressWidth - 39);\r
}\r
\r
ASSERT (Pml4Entries <= 0x200);\r
**/\r
EFI_STATUS\r
PublishPeiMemory (\r
- VOID\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
EFI_STATUS Status;\r
UINT32 S3AcpiReservedMemoryBase;\r
UINT32 S3AcpiReservedMemorySize;\r
\r
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (&mPlatformInfoHob);\r
- if (mPlatformInfoHob.SmmSmramRequire) {\r
+ LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+ if (PlatformInfoHob->SmmSmramRequire) {\r
//\r
// TSEG is chipped from the end of low RAM\r
//\r
- LowerMemorySize -= mPlatformInfoHob.Q35TsegMbytes * SIZE_1MB;\r
+ LowerMemorySize -= PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;\r
}\r
\r
S3AcpiReservedMemoryBase = 0;\r
// downwards. Its size is primarily dictated by CpuMpPei. The formula below\r
// is an approximation.\r
//\r
- if (mPlatformInfoHob.S3Supported) {\r
+ if (PlatformInfoHob->S3Supported) {\r
S3AcpiReservedMemorySize = SIZE_512KB +\r
- mPlatformInfoHob.PcdCpuMaxLogicalProcessorNumber *\r
+ PlatformInfoHob->PcdCpuMaxLogicalProcessorNumber *\r
PcdGet32 (PcdCpuApStackSize);\r
S3AcpiReservedMemoryBase = LowerMemorySize - S3AcpiReservedMemorySize;\r
LowerMemorySize = S3AcpiReservedMemoryBase;\r
}\r
\r
- mPlatformInfoHob.S3AcpiReservedMemoryBase = S3AcpiReservedMemoryBase;\r
- mPlatformInfoHob.S3AcpiReservedMemorySize = S3AcpiReservedMemorySize;\r
+ PlatformInfoHob->S3AcpiReservedMemoryBase = S3AcpiReservedMemoryBase;\r
+ PlatformInfoHob->S3AcpiReservedMemorySize = S3AcpiReservedMemorySize;\r
\r
- if (mPlatformInfoHob.BootMode == BOOT_ON_S3_RESUME) {\r
+ if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {\r
MemoryBase = S3AcpiReservedMemoryBase;\r
MemorySize = S3AcpiReservedMemorySize;\r
} else {\r
- PeiMemoryCap = GetPeiMemoryCap ();\r
+ PeiMemoryCap = GetPeiMemoryCap (PlatformInfoHob);\r
DEBUG ((\r
DEBUG_INFO,\r
"%a: PhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",\r
__FUNCTION__,\r
- mPlatformInfoHob.PhysMemAddressWidth,\r
+ PlatformInfoHob->PhysMemAddressWidth,\r
PeiMemoryCap >> 10\r
));\r
\r
// allocation HOB, and other allocations served from the permanent PEI RAM\r
// shouldn't overlap with that HOB.\r
//\r
- MemoryBase = mPlatformInfoHob.S3Supported && mPlatformInfoHob.SmmSmramRequire ?\r
+ MemoryBase = PlatformInfoHob->S3Supported && PlatformInfoHob->SmmSmramRequire ?\r
PcdGet32 (PcdOvmfDecompressionScratchEnd) :\r
PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);\r
MemorySize = LowerMemorySize - MemoryBase;\r
// normal boot permanent PEI RAM. Regarding the S3 boot path, the S3\r
// permanent PEI RAM is located even higher.\r
//\r
- if (mPlatformInfoHob.SmmSmramRequire && mPlatformInfoHob.Q35SmramAtDefaultSmbase) {\r
+ if (PlatformInfoHob->SmmSmramRequire && PlatformInfoHob->Q35SmramAtDefaultSmbase) {\r
ASSERT (SMM_DEFAULT_SMBASE + MCH_DEFAULT_SMBASE_SIZE <= MemoryBase);\r
}\r
\r