ArmVirtPkg, OvmfPkg: retire QemuFwCfgS3Enabled() from QemuFwCfgLib

[mirror_edk2.git] / OvmfPkg / PlatformPei / MemDetect.c

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index ed13c57beb2fc68c271a1c375e9f95e0d5e7d92a..af96a04d194aae3fecb5a22534201f47ee83d79d 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -1,7 +1,7 @@
 /**@file\r
   Memory Detection for Virtual Machines.\r
 \r
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -39,6 +39,9 @@ Module Name:
 \r
 UINT8 mPhysMemAddressWidth;\r
 \r
+STATIC UINT32 mS3AcpiReservedMemoryBase;\r
+STATIC UINT32 mS3AcpiReservedMemorySize;\r
+\r
 UINT32\r
 GetSystemMemorySizeBelow4gb (\r
   VOID\r
@@ -104,6 +107,7 @@ GetFirstNonAddress (
   FIRMWARE_CONFIG_ITEM FwCfgItem;\r
   UINTN                FwCfgSize;\r
   UINT64               HotPlugMemoryEnd;\r
+  RETURN_STATUS        PcdStatus;\r
 \r
   FirstNonAddress = BASE_4GB + GetSystemMemorySizeAbove4gb ();\r
 \r
@@ -151,7 +155,8 @@ GetFirstNonAddress (
     if (mBootMode != BOOT_ON_S3_RESUME) {\r
       DEBUG ((EFI_D_INFO, "%a: disabling 64-bit PCI host aperture\n",\r
         __FUNCTION__));\r
-      PcdSet64 (PcdPciMmio64Size, 0);\r
+      PcdStatus = PcdSet64S (PcdPciMmio64Size, 0);\r
+      ASSERT_RETURN_ERROR (PcdStatus);\r
     }\r
 \r
     //\r
@@ -199,8 +204,11 @@ GetFirstNonAddress (
     // the GCD memory space map through our PciHostBridgeLib instance; here we\r
     // only need to set the PCDs.\r
     //\r
-    PcdSet64 (PcdPciMmio64Base, Pci64Base);\r
-    PcdSet64 (PcdPciMmio64Size, Pci64Size);\r
+    PcdStatus = PcdSet64S (PcdPciMmio64Base, Pci64Base);\r
+    ASSERT_RETURN_ERROR (PcdStatus);\r
+    PcdStatus = PcdSet64S (PcdPciMmio64Size, Pci64Size);\r
+    ASSERT_RETURN_ERROR (PcdStatus);\r
+\r
     DEBUG ((EFI_D_INFO, "%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n",\r
       __FUNCTION__, Pci64Base, Pci64Size));\r
   }\r
@@ -332,21 +340,34 @@ PublishPeiMemory (
   EFI_STATUS                  Status;\r
   EFI_PHYSICAL_ADDRESS        MemoryBase;\r
   UINT64                      MemorySize;\r
-  UINT64                      LowerMemorySize;\r
+  UINT32                      LowerMemorySize;\r
   UINT32                      PeiMemoryCap;\r
 \r
+  LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
+  if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
+    //\r
+    // TSEG is chipped from the end of low RAM\r
+    //\r
+    LowerMemorySize -= FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;\r
+  }\r
+\r
+  //\r
+  // If S3 is supported, then the S3 permanent PEI memory is placed next,\r
+  // downwards. Its size is primarily dictated by CpuMpPei. The formula below\r
+  // is an approximation.\r
+  //\r
+  if (mS3Supported) {\r
+    mS3AcpiReservedMemorySize = SIZE_512KB +\r
+      mMaxCpuCount *\r
+      PcdGet32 (PcdCpuApStackSize);\r
+    mS3AcpiReservedMemoryBase = LowerMemorySize - mS3AcpiReservedMemorySize;\r
+    LowerMemorySize = mS3AcpiReservedMemoryBase;\r
+  }\r
+\r
   if (mBootMode == BOOT_ON_S3_RESUME) {\r
-    MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);\r
-    MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);\r
+    MemoryBase = mS3AcpiReservedMemoryBase;\r
+    MemorySize = mS3AcpiReservedMemorySize;\r
   } else {\r
-    LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
-    if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
-      //\r
-      // TSEG is chipped from the end of low RAM\r
-      //\r
-      LowerMemorySize -= FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;\r
-    }\r
-\r
     PeiMemoryCap = GetPeiMemoryCap ();\r
     DEBUG ((EFI_D_INFO, "%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",\r
       __FUNCTION__, mPhysMemAddressWidth, PeiMemoryCap >> 10));\r
@@ -404,7 +425,29 @@ QemuInitializeRam (
   LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
   UpperMemorySize = GetSystemMemorySizeAbove4gb ();\r
 \r
-  if (mBootMode != BOOT_ON_S3_RESUME) {\r
+  if (mBootMode == BOOT_ON_S3_RESUME) {\r
+    //\r
+    // Create the following memory HOB as an exception on the S3 boot path.\r
+    //\r
+    // Normally we'd create memory HOBs only on the normal boot path. However,\r
+    // CpuMpPei specifically needs such a low-memory HOB on the S3 path as\r
+    // well, for "borrowing" a subset of it temporarily, for the AP startup\r
+    // vector.\r
+    //\r
+    // CpuMpPei saves the original contents of the borrowed area in permanent\r
+    // PEI RAM, in a backup buffer allocated with the normal PEI services.\r
+    // CpuMpPei restores the original contents ("returns" the borrowed area) at\r
+    // End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before\r
+    // transferring control to the OS's wakeup vector in the FACS.\r
+    //\r
+    // We expect any other PEIMs that "borrow" memory similarly to CpuMpPei to\r
+    // restore the original contents. Furthermore, we expect all such PEIMs\r
+    // (CpuMpPei included) to claim the borrowed areas by producing memory\r
+    // allocation HOBs, and to honor preexistent memory allocation HOBs when\r
+    // looking for an area to borrow.\r
+    //\r
+    AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r
+  } else {\r
     //\r
     // Create memory HOBs\r
     //\r
@@ -422,7 +465,7 @@ QemuInitializeRam (
     }\r
 \r
     if (UpperMemorySize != 0) {\r
-      AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
+      AddMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
     }\r
   }\r
 \r
@@ -492,8 +535,8 @@ InitializeRamRegions (
     // This is the memory range that will be used for PEI on S3 resume\r
     //\r
     BuildMemoryAllocationHob (\r
-      (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),\r
-      (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),\r
+      mS3AcpiReservedMemoryBase,\r
+      mS3AcpiReservedMemorySize,\r
       EfiACPIMemoryNVS\r
       );\r
 \r