Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>\r
\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
{\r
EFI_PHYSICAL_ADDRESS VariableStore;\r
RETURN_STATUS PcdStatus;\r
- UINT32 Alignment;\r
\r
//\r
// Allocate storage for NV variables early on so it will be\r
// across reboots, this allows the NV variable storage to survive\r
// a VM reboot.\r
//\r
- Alignment = PcdGet32 (PcdFlashNvStorageFtwSpareSize);\r
- if ((Alignment & (Alignment - 1)) != 0) {\r
- //\r
- // Round up Alignment to the next power of two.\r
- //\r
- Alignment = GetPowerOfTwo32 (Alignment) << 1;\r
- }\r
-\r
VariableStore =\r
(EFI_PHYSICAL_ADDRESS)(UINTN)\r
- AllocateAlignedRuntimePages (\r
- EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)),\r
- Alignment\r
+ AllocateRuntimePages (\r
+ EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize))\r
);\r
DEBUG ((EFI_D_INFO,\r
- "Reserved variable store memory: 0x%lX; size: %dkb, "\r
- "alignment: 0x%x\n",\r
+ "Reserved variable store memory: 0x%lX; size: %dkb\n",\r
VariableStore,\r
- (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024,\r
- Alignment\r
+ (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024\r
));\r
PcdStatus = PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore);\r
ASSERT_RETURN_ERROR (PcdStatus);\r
{\r
EFI_STATUS Status;\r
\r
- DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));\r
+ DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));\r
\r
DebugDumpCmos ();\r
\r
AddressWidthInitialization ();\r
MaxCpuCountInitialization ();\r
\r
+ //\r
+ // Query Host Bridge DID\r
+ //\r
+ mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
+\r
+ if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
+ Q35TsegMbytesInitialization ();\r
+ }\r
+\r
PublishPeiMemory ();\r
\r
InitializeRamRegions ();\r
InitializeXen ();\r
}\r
\r
- //\r
- // Query Host Bridge DID\r
- //\r
- mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
-\r
if (mBootMode != BOOT_ON_S3_RESUME) {\r
- ReserveEmuVariableNvStore ();\r
+ if (!FeaturePcdGet (PcdSmmSmramRequire)) {\r
+ ReserveEmuVariableNvStore ();\r
+ }\r
PeiFvInitialization ();\r
MemMapInitialization ();\r
NoexecDxeInitialization ();\r
}\r
\r
+ InstallClearCacheCallback ();\r
+ AmdSevInitialize ();\r
MiscInitialization ();\r
InstallFeatureControlCallback ();\r
\r