OvmfPkg/PlatformPei: Refactor InitializeRamRegions

[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.c

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index af9e72cd7a9803f134a3c427c68eaccd37e8aba2..f89d14493ecf16a3ae151342fdd642936aca91ce 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -79,7 +79,7 @@ MemMapInitialization (
     return;\r
   }\r
 \r
-  TopOfLowRam  = GetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  TopOfLowRam  = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
   PciExBarBase = 0;\r
   if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
     //\r
@@ -380,13 +380,7 @@ MiscInitialization (
       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;\r
       break;\r
     case CLOUDHV_DEVICE_ID:\r
-      DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor host bridge\n", __FUNCTION__));\r
-      PcdStatus = PcdSet16S (\r
-                    PcdOvmfHostBridgePciDevId,\r
-                    CLOUDHV_DEVICE_ID\r
-                    );\r
-      ASSERT_RETURN_ERROR (PcdStatus);\r
-      return;\r
+      break;\r
     default:\r
       DEBUG ((\r
         DEBUG_ERROR,\r
@@ -401,6 +395,11 @@ MiscInitialization (
   PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, PlatformInfoHob->HostBridgeDevId);\r
   ASSERT_RETURN_ERROR (PcdStatus);\r
 \r
+  if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {\r
+    DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor is done.\n", __FUNCTION__));\r
+    return;\r
+  }\r
+\r
   //\r
   // If the appropriate IOspace enable bit is set, assume the ACPI PMBA has\r
   // been configured and skip the setup here. This matches the logic in\r
@@ -540,16 +539,15 @@ Q35BoardVerification (
 \r
 /**\r
   Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r
-  them to UefiCpuPkg modules. Set the mMaxCpuCount variable.\r
+  them to UefiCpuPkg modules. Set the MaxCpuCount field in PlatformInfoHob.\r
 **/\r
 VOID\r
-MaxCpuCountInitialization (\r
+PlatformMaxCpuCountInitialization (\r
   IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   )\r
 {\r
-  UINT16         BootCpuCount;\r
-  UINT32         MaxCpuCount;\r
-  RETURN_STATUS  PcdStatus;\r
+  UINT16  BootCpuCount;\r
+  UINT32  MaxCpuCount;\r
 \r
   //\r
   // Try to fetch the boot CPU count.\r
@@ -706,15 +704,29 @@ MaxCpuCountInitialization (
     ));\r
   ASSERT (BootCpuCount <= MaxCpuCount);\r
 \r
-  PcdStatus = PcdSet32S (PcdCpuBootLogicalProcessorNumber, BootCpuCount);\r
-  ASSERT_RETURN_ERROR (PcdStatus);\r
-  PcdStatus = PcdSet32S (PcdCpuMaxLogicalProcessorNumber, MaxCpuCount);\r
-  ASSERT_RETURN_ERROR (PcdStatus);\r
-\r
   PlatformInfoHob->PcdCpuMaxLogicalProcessorNumber  = MaxCpuCount;\r
   PlatformInfoHob->PcdCpuBootLogicalProcessorNumber = BootCpuCount;\r
 }\r
 \r
+/**\r
+  Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r
+  them to UefiCpuPkg modules. Set the MaxCpuCount field in PlatformInfoHob.\r
+**/\r
+VOID\r
+MaxCpuCountInitialization (\r
+  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
+  )\r
+{\r
+  RETURN_STATUS  PcdStatus;\r
+\r
+  PlatformMaxCpuCountInitialization (PlatformInfoHob);\r
+\r
+  PcdStatus = PcdSet32S (PcdCpuBootLogicalProcessorNumber, PlatformInfoHob->PcdCpuBootLogicalProcessorNumber);\r
+  ASSERT_RETURN_ERROR (PcdStatus);\r
+  PcdStatus = PcdSet32S (PcdCpuMaxLogicalProcessorNumber, PlatformInfoHob->PcdCpuMaxLogicalProcessorNumber);\r
+  ASSERT_RETURN_ERROR (PcdStatus);\r
+}\r
+\r
 /**\r
   Perform Platform PEI initialization.\r
 \r
@@ -735,8 +747,10 @@ InitializePlatform (
 \r
   DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));\r
 \r
-  mPlatformInfoHob.SmmSmramRequire = FeaturePcdGet (PcdSmmSmramRequire);\r
-  mPlatformInfoHob.SevEsIsEnabled  = MemEncryptSevEsIsEnabled ();\r
+  mPlatformInfoHob.SmmSmramRequire     = FeaturePcdGet (PcdSmmSmramRequire);\r
+  mPlatformInfoHob.SevEsIsEnabled      = MemEncryptSevEsIsEnabled ();\r
+  mPlatformInfoHob.PcdPciMmio64Size    = PcdGet64 (PcdPciMmio64Size);\r
+  mPlatformInfoHob.DefaultMaxCpuNumber = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);\r
 \r
   PlatformDebugDumpCmos ();\r
 \r
@@ -766,7 +780,7 @@ InitializePlatform (
 \r
   PublishPeiMemory ();\r
 \r
-  QemuUc32BaseInitialization (&mPlatformInfoHob);\r
+  PlatformQemuUc32BaseInitialization (&mPlatformInfoHob);\r
 \r
   InitializeRamRegions (&mPlatformInfoHob);\r
 \r