Copyright (C) 2014, Red Hat, Inc.\r
Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
\r
- This program and the accompanying materials are licensed and made available\r
- under the terms and conditions of the BSD License which accompanies this\r
- distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
- WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
#include <IndustryStandard/LegacyVgaBios.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/PrintLib.h>\r
+#include <OvmfPlatforms.h>\r
\r
#include "Qemu.h"\r
#include "VbeShim.h"\r
EFI_PHYSICAL_ADDRESS Segment0, SegmentC, SegmentF;\r
UINTN Segment0Pages;\r
IVT_ENTRY *Int0x10;\r
- EFI_STATUS Status;\r
+ EFI_STATUS Segment0AllocationStatus;\r
+ UINT16 HostBridgeDevId;\r
UINTN Pam1Address;\r
UINT8 Pam1;\r
UINTN SegmentCPages;\r
UINTN Printed;\r
VBE_MODE_INFO *VbeModeInfo;\r
\r
+ if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT0|BIT7)) == BIT0) {\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: page 0 protected, not installing VBE shim\n",\r
+ __FUNCTION__\r
+ ));\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: page 0 protection prevents Windows 7 from booting anyway\n",\r
+ __FUNCTION__\r
+ ));\r
+ return;\r
+ }\r
+\r
Segment0 = 0x00000;\r
SegmentC = 0xC0000;\r
SegmentF = 0xF0000;\r
// The allocation request may fail, eg. if LegacyBiosDxe has already run.\r
//\r
Segment0Pages = 1;\r
- Int0x10 = (IVT_ENTRY *)(UINTN)Segment0 + 0x10;\r
- Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode,\r
- Segment0Pages, &Segment0);\r
-\r
- if (EFI_ERROR (Status)) {\r
+ Int0x10 = (IVT_ENTRY *)(UINTN)(Segment0 + 0x10 * sizeof (IVT_ENTRY));\r
+ Segment0AllocationStatus = gBS->AllocatePages (\r
+ AllocateAddress,\r
+ EfiBootServicesCode,\r
+ Segment0Pages,\r
+ &Segment0\r
+ );\r
+\r
+ if (EFI_ERROR (Segment0AllocationStatus)) {\r
EFI_PHYSICAL_ADDRESS Handler;\r
\r
//\r
//\r
Handler = (Int0x10->Segment << 4) + Int0x10->Offset;\r
if (Handler >= SegmentC && Handler < SegmentF) {\r
- DEBUG ((EFI_D_VERBOSE, "%a: Video BIOS handler found at %04x:%04x\n",\r
+ DEBUG ((DEBUG_INFO, "%a: Video BIOS handler found at %04x:%04x\n",\r
__FUNCTION__, Int0x10->Segment, Int0x10->Offset));\r
return;\r
}\r
// Otherwise we'll overwrite the Int10h vector, even though we may not own\r
// the page at zero.\r
//\r
- DEBUG ((EFI_D_VERBOSE, "%a: failed to allocate page at zero: %r\n",\r
- __FUNCTION__, Status));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: failed to allocate page at zero: %r\n",\r
+ __FUNCTION__,\r
+ Segment0AllocationStatus\r
+ ));\r
} else {\r
//\r
// We managed to allocate the page at zero. SVN r14218 guarantees that it\r
//\r
// Put the shim in place first.\r
//\r
- Pam1Address = PCI_LIB_ADDRESS (0, 0, 0, 0x5A);\r
+ // Start by determining the address of the PAM1 register.\r
+ //\r
+ HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);\r
+ switch (HostBridgeDevId) {\r
+ case INTEL_82441_DEVICE_ID:\r
+ Pam1Address = PMC_REGISTER_PIIX4 (PIIX4_PAM1);\r
+ break;\r
+ case INTEL_Q35_MCH_DEVICE_ID:\r
+ Pam1Address = DRAMC_REGISTER_Q35 (MCH_PAM1);\r
+ break;\r
+ default:\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: unknown host bridge device ID: 0x%04x\n",\r
+ __FUNCTION__,\r
+ HostBridgeDevId\r
+ ));\r
+ ASSERT (FALSE);\r
+\r
+ if (!EFI_ERROR (Segment0AllocationStatus)) {\r
+ gBS->FreePages (Segment0, Segment0Pages);\r
+ }\r
+ return;\r
+ }\r
//\r
// low nibble covers 0xC0000 to 0xC3FFF\r
// high nibble covers 0xC4000 to 0xC7FFF\r
PciWrite8 (Pam1Address, Pam1 | (BIT1 | BIT0));\r
\r
//\r
- // We never added memory space durig PEI or DXE for the C segment, so we\r
+ // We never added memory space during PEI or DXE for the C segment, so we\r
// don't need to (and can't) allocate from there. Also, guest operating\r
// systems will see a hole in the UEFI memory map there.\r
//\r
CopyMem (VbeInfo->Signature, "VESA", 4);\r
VbeInfo->VesaVersion = 0x0300;\r
\r
- VbeInfo->OemNameAddress = (UINT32)(SegmentC << 12 | (UINT16)(UINTN)Ptr);\r
+ VbeInfo->OemNameAddress = (UINT32)SegmentC << 12 | (UINT16)(UINTN)Ptr;\r
CopyMem (Ptr, "QEMU", 5);\r
Ptr += 5;\r
\r
VbeInfo->Capabilities = BIT0; // DAC can be switched into 8-bit mode\r
\r
- VbeInfo->ModeListAddress = (UINT32)(SegmentC << 12 | (UINT16)(UINTN)Ptr);\r
+ VbeInfo->ModeListAddress = (UINT32)SegmentC << 12 | (UINT16)(UINTN)Ptr;\r
*(UINT16*)Ptr = 0x00f1; // mode number\r
Ptr += 2;\r
*(UINT16*)Ptr = 0xFFFF; // mode list terminator\r
VbeInfo->VideoMem64K = (UINT16)((1024 * 768 * 4 + 65535) / 65536);\r
VbeInfo->OemSoftwareVersion = 0x0000;\r
\r
- VbeInfo->VendorNameAddress = (UINT32)(SegmentC << 12 | (UINT16)(UINTN)Ptr);\r
+ VbeInfo->VendorNameAddress = (UINT32)SegmentC << 12 | (UINT16)(UINTN)Ptr;\r
CopyMem (Ptr, "OVMF", 5);\r
Ptr += 5;\r
\r
- VbeInfo->ProductNameAddress = (UINT32)(SegmentC << 12 | (UINT16)(UINTN)Ptr);\r
+ VbeInfo->ProductNameAddress = (UINT32)SegmentC << 12 | (UINT16)(UINTN)Ptr;\r
Printed = AsciiSPrint ((CHAR8 *)Ptr,\r
sizeof VbeInfoFull->Buffer - (Ptr - VbeInfoFull->Buffer), "%s",\r
CardName);\r
Ptr += Printed + 1;\r
\r
- VbeInfo->ProductRevAddress = (UINT32)(SegmentC << 12 | (UINT16)(UINTN)Ptr);\r
+ VbeInfo->ProductRevAddress = (UINT32)SegmentC << 12 | (UINT16)(UINTN)Ptr;\r
CopyMem (Ptr, mProductRevision, sizeof mProductRevision);\r
Ptr += sizeof mProductRevision;\r
\r
//\r
// Second, point the Int10h vector at the shim.\r
//\r
- Int0x10->Segment = (UINT16) (SegmentC >> 4);\r
+ Int0x10->Segment = (UINT16) ((UINT32)SegmentC >> 4);\r
Int0x10->Offset = (UINT16) ((UINTN) (VbeModeInfo + 1) - SegmentC);\r
\r
- DEBUG ((EFI_D_INFO, "%a: VBE shim installed\n", __FUNCTION__));\r
+ DEBUG ((DEBUG_INFO, "%a: VBE shim installed\n", __FUNCTION__));\r
}\r