OvmfPkg/AmdSev: reserve MEMFD space for for firmware config hashes

[mirror_edk2.git] / OvmfPkg / ResetVector / ResetVector.nasmb

diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
index 29cbad36771184c067eda4dff87296b30e79210a..acec46a3245054518bbffd9389ed3544c1dd12ae 100644 (file)
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -3,13 +3,8 @@
 ; This file includes all other code files to assemble the reset vector code\r
 ;\r
 ; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution.  The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
+; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ;------------------------------------------------------------------------------\r
 \r
@@ -59,8 +54,30 @@
     %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"\r
   %endif\r
 \r
+  %if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)\r
+    %error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"\r
+  %endif\r
+\r
+  %if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)\r
+    %error "This implementation inherently depends on PcdOvmfSecGhcbSize"\r
+  %endif\r
+\r
+  %if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \\r
+       ((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))\r
+    %error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"\r
+  %endif\r
+\r
   %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))\r
+\r
+  %define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))\r
+  %define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))\r
+  %define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))\r
+  %define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))\r
+  %define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)\r
+  %define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)\r
+  %define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))\r
 %include "Ia32/Flat32ToFlat64.asm"\r
+%include "Ia32/AmdSev.asm"\r
 %include "Ia32/PageTables64.asm"\r
 %endif\r
 \r
@@ -69,5 +86,10 @@
 \r
 %include "Main.asm"\r
 \r
+  %define SEV_ES_AP_RESET_IP  FixedPcdGet32 (PcdSevEsWorkAreaBase)\r
+  %define SEV_LAUNCH_SECRET_BASE  FixedPcdGet32 (PcdSevLaunchSecretBase)\r
+  %define SEV_LAUNCH_SECRET_SIZE  FixedPcdGet32 (PcdSevLaunchSecretSize)\r
+  %define SEV_FW_HASH_BLOCK_BASE  FixedPcdGet32 (PcdQemuHashTableBase)\r
+  %define SEV_FW_HASH_BLOCK_SIZE  FixedPcdGet32 (PcdQemuHashTableSize)\r
 %include "Ia16/ResetVectorVtf0.asm"\r
 \r