Add generic HPET Timer DXE Driver and support libraries

[mirror_edk2.git] / PcAtChipsetPkg / Include / Register / IoApic.h

diff --git a/PcAtChipsetPkg/Include/Register/IoApic.h b/PcAtChipsetPkg/Include/Register/IoApic.h
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+++ b/PcAtChipsetPkg/Include/Register/IoApic.h
@@ -0,0 +1,86 @@
+/** @file\r
+  I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt \r
+  Controller (IOAPIC), 1996.\r
+  \r
+  Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __IO_APIC_H__\r
+#define __IO_APIC_H__\r
+\r
+///\r
+/// I/O APIC Register Offsets\r
+///\r
+#define IOAPIC_INDEX_OFFSET  0x00\r
+#define IOAPIC_DATA_OFFSET   0x10\r
+\r
+///\r
+/// I/O APIC Indirect Register Indexes\r
+///\r
+#define IO_APIC_IDENTIFICATION_REGISTER_INDEX  0x00\r
+#define IO_APIC_VERSION_REGISTER_INDEX         0x01\r
+#define IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX  0x10\r
+\r
+///\r
+/// I/O APIC Interrupt Deliver Modes\r
+///\r
+#define IO_APIC_DELIVERY_MODE_FIXED            0\r
+#define IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY  1\r
+#define IO_APIC_DELIVERY_MODE_SMI              2\r
+#define IO_APIC_DELIVERY_MODE_NMI              4\r
+#define IO_APIC_DELIVERY_MODE_INIT             5\r
+#define IO_APIC_DELIVERY_MODE_EXTINT           7\r
+\r
+#pragma pack(1)\r
+\r
+typedef union {\r
+  struct {\r
+    UINT32  Reserved0:24;\r
+    UINT32  Identification:4;\r
+    UINT32  Reserved1:4;\r
+  } Bits;\r
+  UINT32  Uint32;\r
+} IO_APIC_IDENTIFICATION_REGISTER;\r
+\r
+typedef union {\r
+  struct {\r
+    UINT32  Version:8;\r
+    UINT32  Reserved0:8;\r
+    UINT32  MaximumRedirectionEntry:8;\r
+    UINT32  Reserved1:8;\r
+  } Bits;\r
+  UINT32  Uint32;\r
+} IO_APIC_VERSION_REGISTER;\r
+\r
+typedef union {\r
+  struct {\r
+    UINT32  Vector:          8;\r
+    UINT32  DeliveryMode:    3;\r
+    UINT32  DestinationMode: 1;\r
+    UINT32  DeliveryStatus:  1;\r
+    UINT32  Polarity:        1;\r
+    UINT32  RemoteIRR:       1;\r
+    UINT32  TriggerMode:     1;\r
+    UINT32  Mask:            1;\r
+    UINT32  Reserved0:       15;\r
+    UINT32  Reserved1:       24;\r
+    UINT32  DestinationID:   8;\r
+  } Bits;\r
+  struct {\r
+    UINT32  Low;\r
+    UINT32  High;\r
+  } Uint32;\r
+  UINT64  Uint64;\r
+} IO_APIC_REDIRECTION_TABLE_ENTRY;\r
+\r
+#pragma pack()\r
+\r
+#endif\r