\r
Copyright (c) 2013 - 2016 Intel Corporation.\r
\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
SaveBarReg = PciRead32 (DevPcieAddr + R_IOH_MAC_MEMBAR);\r
\r
//\r
- // Use predefined tempory memory resource\r
+ // Use predefined temporary memory resource\r
//\r
PciWrite32 ( DevPcieAddr + R_IOH_MAC_MEMBAR, Bar0);\r
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);\r
**/\r
EFI_STATUS\r
EarlyPlatformConfigGpioExpanders (\r
- IN CONST EFI_PLATFORM_TYPE PlatformType\r
+ IN CONST EFI_PLATFORM_TYPE PlatformType,\r
+ EFI_BOOT_MODE BootMode\r
)\r
{\r
EFI_STATUS Status;\r
GALILEO_GEN2_IOEXP2_7BIT_SLAVE_ADDR, // IO Expander 2.\r
15 // P1-7.\r
);\r
+\r
+ if (BootMode != BOOT_IN_RECOVERY_MODE) {\r
+ //\r
+ // Read state of Reset Button - EXP2.P1_7\r
+ // This GPIO is pulled high when the button is not pressed\r
+ // This GPIO reads low when button is pressed\r
+ //\r
+ if (!PlatformPcal9555GpioGetState (\r
+ GALILEO_GEN2_IOEXP2_7BIT_SLAVE_ADDR, // IO Expander 2\r
+ 15 // P1-7\r
+ )) {\r
+ DEBUG ((EFI_D_INFO, " Force Recovery mode and reset\n"));\r
+\r
+ //\r
+ // Set 'B_CFG_STICKY_RW_FORCE_RECOVERY' sticky bit so we know we need to do a recovery following warm reset\r
+ //\r
+ QNCAltPortWrite (\r
+ QUARK_SCSS_SOC_UNIT_SB_PORT_ID,\r
+ QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW,\r
+ QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW) | B_CFG_STICKY_RW_FORCE_RECOVERY\r
+ );\r
+ ResetWarm();\r
+ }\r
+ }\r
}\r
\r
//\r
&Buffer\r
);\r
ASSERT_EFI_ERROR (Status);\r
+\r
+ if (BootMode != BOOT_IN_RECOVERY_MODE) {\r
+ //\r
+ // Read state of RESET_N_SHLD (GPORT5_BIT0)\r
+ //\r
+ Buffer[1] = 5;\r
+ Length = 1;\r
+ ReadLength = 1;\r
+ Status = I2cReadMultipleByte (\r
+ I2CSlaveAddress,\r
+ EfiI2CSevenBitAddrMode,\r
+ &Length,\r
+ &ReadLength,\r
+ &Buffer[1]\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ //\r
+ // Return the state of GPORT5_BIT0\r
+ //\r
+ if ((Buffer[1] & BIT0) == 0) {\r
+ DEBUG ((EFI_D_INFO, " Force Recovery mode and reset\n"));\r
+\r
+ //\r
+ // Set 'B_CFG_STICKY_RW_FORCE_RECOVERY' sticky bit so we know we need to do a recovery following warm reset\r
+ //\r
+ QNCAltPortWrite (\r
+ QUARK_SCSS_SOC_UNIT_SB_PORT_ID,\r
+ QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW,\r
+ QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW) | B_CFG_STICKY_RW_FORCE_RECOVERY\r
+ );\r
+ ResetWarm();\r
+ }\r
+ }\r
}\r
\r
return EFI_SUCCESS;\r
//\r
//\r
DEBUG ((EFI_D_INFO, "EarlyPlatformConfigGpioExpanders ()\n"));\r
- EarlyPlatformConfigGpioExpanders (PlatformType);\r
+ EarlyPlatformConfigGpioExpanders (PlatformType, BootMode);\r
\r
//\r
// Now that all of the pre-permanent memory activities have\r
\r
//\r
// Check if RMU reset system due to access violations.\r
- // RMU updates a SOC Unit register before reseting the system.\r
+ // RMU updates a SOC Unit register before resetting the system.\r
//\r
RegValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW);\r
if ((RegValue & B_CFG_STICKY_RW_VIOLATION) != 0) {\r
//\r
if (CheckForResetDueToErrors (TRUE)) {\r
if(FeaturePcdGet (WaitIfResetDueToError)) {\r
- DEBUG ((EFI_D_ERROR, "Press any key to continue.\n"));\r
- PlatformDebugPortGetChar8 ();\r
+ DEBUG ((EFI_D_ERROR, "Wait 10 seconds.\n"));\r
+ MicroSecondDelay(10000000);\r
}\r
}\r
\r
SaveBarReg = PciRead32 (DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister));\r
\r
//\r
- // Use predefined tempory memory resource.\r
+ // Use predefined temporary memory resource.\r
//\r
PciWrite32 ( DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister), IohGpioBase);\r
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);\r