/** @file\r
- The TPM2 definition block in ACPI table for TCG2 physical presence \r
+ The TPM2 definition block in ACPI table for TCG2 physical presence\r
and MemoryClear.\r
\r
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
(c)Copyright 2016 HP Development Company, L.P.<BR>\r
Copyright (c) 2017, Microsoft Corporation. All rights reserved. <BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
//\r
OperationRegion (SMIP, SystemIO, 0xB2, 1)\r
Field (SMIP, ByteAcc, NoLock, Preserve)\r
- { \r
+ {\r
IOB2, 8\r
}\r
\r
}\r
\r
Method (PTS, 1, Serialized)\r
- { \r
+ {\r
//\r
// Detect Sx state for MOR, only S4, S5 need to handle\r
//\r
If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))\r
- { \r
+ {\r
//\r
// Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.\r
//\r
// Triggle the SMI through ACPI _PTS method.\r
//\r
Store (0x02, MCIP)\r
- \r
+\r
//\r
// Triggle the SMI interrupt\r
//\r
}\r
}\r
Return (0)\r
- } \r
+ }\r
\r
Method (_STA, 0)\r
{\r
}\r
\r
Name(TPM2, Package (0x02){\r
- Zero, \r
+ Zero,\r
Zero\r
})\r
\r
Name(TPM3, Package (0x03){\r
- Zero, \r
+ Zero,\r
Zero,\r
Zero\r
})\r
// TCG Physical Presence Interface\r
//\r
Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r
- { \r
+ {\r
//\r
// Switch by function index\r
//\r
//\r
// b) Submit TPM Operation Request to Pre-OS Environment\r
//\r
- \r
+\r
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
Store (0, PPRM)\r
Store (0x02, PPIP)\r
- \r
+\r
//\r
// Triggle the SMI interrupt\r
//\r
//\r
// c) Get Pending TPM Operation Requested By the OS\r
//\r
- \r
+\r
Store (PPRQ, Index (TPM2, 0x01))\r
Return (TPM2)\r
}\r
// e) Return TPM Operation Response to OS Environment\r
//\r
Store (0x05, PPIP)\r
- \r
+\r
//\r
// Triggle the SMI interrupt\r
//\r
Store (PPIN, IOB2)\r
- \r
+\r
Store (LPPR, Index (TPM3, 0x01))\r
Store (PPRP, Index (TPM3, 0x02))\r
\r
If (LEqual (PPRQ, 23)) {\r
Store (DerefOf (Index (Arg2, 0x01)), PPRM)\r
}\r
- \r
+\r
//\r
- // Triggle the SMI interrupt \r
+ // Triggle the SMI interrupt\r
//\r
- Store (PPIN, IOB2) \r
+ Store (PPIN, IOB2)\r
Return (FRET)\r
}\r
Case (8)\r
//\r
Store (8, PPIP)\r
Store (DerefOf (Index (Arg2, 0x00)), UCRQ)\r
- \r
+\r
//\r
// Triggle the SMI interrupt\r
//\r
Store (PPIN, IOB2)\r
- \r
+\r
Return (FRET)\r
}\r
\r
// Save the Operation Value of the Request to MORD (reserved memory)\r
//\r
Store (DerefOf (Index (Arg2, 0x00)), MORD)\r
- \r
+\r
//\r
// Triggle the SMI through ACPI _DSM method.\r
//\r
Store (0x01, MCIP)\r
- \r
+\r
//\r
// Triggle the SMI interrupt\r
//\r
}\r
Default {BreakPoint}\r
}\r
- Return (1) \r
+ Return (1)\r
}\r
\r
Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})\r