#include "PpttParser.h"\r
\r
// Local variables\r
-STATIC CONST UINT8* ProcessorTopologyStructureType;\r
-STATIC CONST UINT8* ProcessorTopologyStructureLength;\r
-STATIC CONST UINT32* NumberOfPrivateResources;\r
-STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;\r
+STATIC CONST UINT8 *ProcessorTopologyStructureType;\r
+STATIC CONST UINT8 *ProcessorTopologyStructureLength;\r
+STATIC CONST UINT32 *NumberOfPrivateResources;\r
+STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;\r
\r
/**\r
This function validates the Cache Type Structure (Type 1) 'Number of sets'\r
VOID\r
EFIAPI\r
ValidateCacheNumberOfSets (\r
- IN UINT8* Ptr,\r
- IN VOID* Context\r
+ IN UINT8 *Ptr,\r
+ IN VOID *Context\r
)\r
{\r
- UINT32 NumberOfSets;\r
- NumberOfSets = *(UINT32*)Ptr;\r
+ UINT32 NumberOfSets;\r
+\r
+ NumberOfSets = *(UINT32 *)Ptr;\r
\r
if (NumberOfSets == 0) {\r
IncrementErrorCount ();\r
return;\r
}\r
\r
-#if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)\r
+ #if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)\r
if (NumberOfSets > PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX) {\r
IncrementErrorCount ();\r
Print (\r
L"\nERROR: When ARMv8.3-CCIDX is implemented the maximum cache number of "\r
- L"sets must be less than or equal to %d",\r
+ L"sets must be less than or equal to %d",\r
PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX\r
);\r
return;\r
IncrementWarningCount ();\r
Print (\r
L"\nWARNING: Without ARMv8.3-CCIDX, the maximum cache number of sets "\r
- L"must be less than or equal to %d. Ignore this message if "\r
- L"ARMv8.3-CCIDX is implemented",\r
+ L"must be less than or equal to %d. Ignore this message if "\r
+ L"ARMv8.3-CCIDX is implemented",\r
PPTT_ARM_CACHE_NUMBER_OF_SETS_MAX\r
);\r
return;\r
}\r
-#endif\r
\r
+ #endif\r
}\r
\r
/**\r
VOID\r
EFIAPI\r
ValidateCacheAssociativity (\r
- IN UINT8* Ptr,\r
- IN VOID* Context\r
+ IN UINT8 *Ptr,\r
+ IN VOID *Context\r
)\r
{\r
- UINT8 Associativity;\r
- Associativity = *(UINT8*)Ptr;\r
+ UINT8 Associativity;\r
+\r
+ Associativity = *(UINT8 *)Ptr;\r
\r
if (Associativity == 0) {\r
IncrementErrorCount ();\r
VOID\r
EFIAPI\r
ValidateCacheLineSize (\r
- IN UINT8* Ptr,\r
- IN VOID* Context\r
+ IN UINT8 *Ptr,\r
+ IN VOID *Context\r
)\r
{\r
-#if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)\r
+ #if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)\r
// Reference: ARM Architecture Reference Manual ARMv8 (D.a)\r
// Section D12.2.25: CCSIDR_EL1, Current Cache Size ID Register\r
// LineSize, bits [2:0]\r
// (Log2(Number of bytes in cache line)) - 4.\r
\r
- UINT16 LineSize;\r
- LineSize = *(UINT16*)Ptr;\r
+ UINT16 LineSize;\r
+ LineSize = *(UINT16 *)Ptr;\r
\r
if ((LineSize < PPTT_ARM_CACHE_LINE_SIZE_MIN) ||\r
- (LineSize > PPTT_ARM_CACHE_LINE_SIZE_MAX)) {\r
+ (LineSize > PPTT_ARM_CACHE_LINE_SIZE_MAX))\r
+ {\r
IncrementErrorCount ();\r
Print (\r
L"\nERROR: The cache line size must be between %d and %d bytes"\r
- L" on ARM Platforms.",\r
+ L" on ARM Platforms.",\r
PPTT_ARM_CACHE_LINE_SIZE_MIN,\r
PPTT_ARM_CACHE_LINE_SIZE_MAX\r
);\r
IncrementErrorCount ();\r
Print (L"\nERROR: The cache line size is not a power of 2.");\r
}\r
-#endif\r
+\r
+ #endif\r
}\r
\r
/**\r
VOID\r
EFIAPI\r
ValidateCacheAttributes (\r
- IN UINT8* Ptr,\r
- IN VOID* Context\r
+ IN UINT8 *Ptr,\r
+ IN VOID *Context\r
)\r
{\r
// Reference: Advanced Configuration and Power Interface (ACPI) Specification\r
// Version 6.2 Errata A, September 2017\r
// Table 5-153: Cache Type Structure\r
- UINT8 Attributes;\r
- Attributes = *(UINT8*)Ptr;\r
+ UINT8 Attributes;\r
+\r
+ Attributes = *(UINT8 *)Ptr;\r
\r
if ((Attributes & 0xE0) != 0) {\r
IncrementErrorCount ();\r
/**\r
An ACPI_PARSER array describing the ACPI PPTT Table.\r
**/\r
-STATIC CONST ACPI_PARSER PpttParser[] = {\r
+STATIC CONST ACPI_PARSER PpttParser[] = {\r
PARSE_ACPI_HEADER (&AcpiHdrInfo)\r
};\r
\r
/**\r
An ACPI_PARSER array describing the processor topology structure header.\r
**/\r
-STATIC CONST ACPI_PARSER ProcessorTopologyStructureHeaderParser[] = {\r
- {L"Type", 1, 0, NULL, NULL, (VOID**)&ProcessorTopologyStructureType,\r
- NULL, NULL},\r
- {L"Length", 1, 1, NULL, NULL, (VOID**)&ProcessorTopologyStructureLength,\r
- NULL, NULL},\r
- {L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL}\r
+STATIC CONST ACPI_PARSER ProcessorTopologyStructureHeaderParser[] = {\r
+ { L"Type", 1, 0, NULL, NULL, (VOID **)&ProcessorTopologyStructureType,\r
+ NULL, NULL },\r
+ { L"Length", 1, 1, NULL, NULL, (VOID **)&ProcessorTopologyStructureLength,\r
+ NULL, NULL },\r
+ { L"Reserved", 2, 2, NULL, NULL, NULL, NULL,NULL }\r
};\r
\r
/**\r
An ACPI_PARSER array describing the Processor Hierarchy Node Structure - Type 0.\r
**/\r
-STATIC CONST ACPI_PARSER ProcessorHierarchyNodeStructureParser[] = {\r
- {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},\r
- {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},\r
-\r
- {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Parent", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"ACPI Processor ID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Number of private resources", 4, 16, L"%d", NULL,\r
- (VOID**)&NumberOfPrivateResources, NULL, NULL}\r
+STATIC CONST ACPI_PARSER ProcessorHierarchyNodeStructureParser[] = {\r
+ { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },\r
+ { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },\r
+\r
+ { L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Parent", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"ACPI Processor ID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Number of private resources", 4, 16, L"%d", NULL,\r
+ (VOID **)&NumberOfPrivateResources, NULL, NULL }\r
};\r
\r
/**\r
An ACPI_PARSER array describing the Cache Type Structure - Type 1.\r
**/\r
-STATIC CONST ACPI_PARSER CacheTypeStructureParser[] = {\r
- {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},\r
- {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},\r
-\r
- {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Next Level of Cache", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Size", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Number of sets", 4, 16, L"%d", NULL, NULL, ValidateCacheNumberOfSets, NULL},\r
- {L"Associativity", 1, 20, L"%d", NULL, NULL, ValidateCacheAssociativity, NULL},\r
- {L"Attributes", 1, 21, L"0x%x", NULL, NULL, ValidateCacheAttributes, NULL},\r
- {L"Line size", 2, 22, L"%d", NULL, NULL, ValidateCacheLineSize, NULL}\r
+STATIC CONST ACPI_PARSER CacheTypeStructureParser[] = {\r
+ { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },\r
+ { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },\r
+\r
+ { L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Next Level of Cache", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Size", 4, 12, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Number of sets", 4, 16, L"%d", NULL, NULL, ValidateCacheNumberOfSets, NULL },\r
+ { L"Associativity", 1, 20, L"%d", NULL, NULL, ValidateCacheAssociativity, NULL },\r
+ { L"Attributes", 1, 21, L"0x%x", NULL, NULL, ValidateCacheAttributes, NULL },\r
+ { L"Line size", 2, 22, L"%d", NULL, NULL, ValidateCacheLineSize, NULL }\r
};\r
\r
/**\r
An ACPI_PARSER array describing the ID Type Structure - Type 2.\r
**/\r
-STATIC CONST ACPI_PARSER IdStructureParser[] = {\r
- {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},\r
- {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},\r
-\r
- {L"VENDOR_ID", 4, 4, NULL, Dump4Chars, NULL, NULL, NULL},\r
- {L"LEVEL_1_ID", 8, 8, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"LEVEL_2_ID", 8, 16, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"MAJOR_REV", 2, 24, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"MINOR_REV", 2, 26, L"0x%x", NULL, NULL, NULL, NULL},\r
- {L"SPIN_REV", 2, 28, L"0x%x", NULL, NULL, NULL, NULL},\r
+STATIC CONST ACPI_PARSER IdStructureParser[] = {\r
+ { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },\r
+ { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },\r
+\r
+ { L"VENDOR_ID", 4, 4, NULL, Dump4Chars, NULL, NULL, NULL },\r
+ { L"LEVEL_1_ID", 8, 8, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"LEVEL_2_ID", 8, 16, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"MAJOR_REV", 2, 24, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"MINOR_REV", 2, 26, L"0x%x", NULL, NULL, NULL, NULL },\r
+ { L"SPIN_REV", 2, 28, L"0x%x", NULL, NULL, NULL, NULL },\r
};\r
\r
/**\r
STATIC\r
VOID\r
DumpProcessorHierarchyNodeStructure (\r
- IN UINT8* Ptr,\r
+ IN UINT8 *Ptr,\r
IN UINT8 Length\r
)\r
{\r
- UINT32 Offset;\r
- UINT32 Index;\r
- CHAR16 Buffer[OUTPUT_FIELD_COLUMN_WIDTH];\r
+ UINT32 Offset;\r
+ UINT32 Index;\r
+ CHAR16 Buffer[OUTPUT_FIELD_COLUMN_WIDTH];\r
\r
Offset = ParseAcpi (\r
TRUE,\r
IncrementErrorCount ();\r
Print (\r
L"ERROR: Invalid Number of Private Resources. " \\r
- L"PrivateResourceCount = %d. RemainingBufferLength = %d. " \\r
- L"Parsing of this structure aborted.\n",\r
+ L"PrivateResourceCount = %d. RemainingBufferLength = %d. " \\r
+ L"Parsing of this structure aborted.\n",\r
*NumberOfPrivateResources,\r
Length - Offset\r
);\r
PrintFieldName (4, Buffer);\r
Print (\r
L"0x%x\n",\r
- *((UINT32*)(Ptr + Offset))\r
+ *((UINT32 *)(Ptr + Offset))\r
);\r
\r
Offset += sizeof (UINT32);\r
STATIC\r
VOID\r
DumpCacheTypeStructure (\r
- IN UINT8* Ptr,\r
+ IN UINT8 *Ptr,\r
IN UINT8 Length\r
)\r
{\r
STATIC\r
VOID\r
DumpIDStructure (\r
- IN UINT8* Ptr,\r
- IN UINT8 Length\r
+ IN UINT8 *Ptr,\r
+ IN UINT8 Length\r
)\r
{\r
ParseAcpi (\r
VOID\r
EFIAPI\r
ParseAcpiPptt (\r
- IN BOOLEAN Trace,\r
- IN UINT8* Ptr,\r
- IN UINT32 AcpiTableLength,\r
- IN UINT8 AcpiTableRevision\r
+ IN BOOLEAN Trace,\r
+ IN UINT8 *Ptr,\r
+ IN UINT32 AcpiTableLength,\r
+ IN UINT8 AcpiTableRevision\r
)\r
{\r
- UINT32 Offset;\r
- UINT8* ProcessorTopologyStructurePtr;\r
+ UINT32 Offset;\r
+ UINT8 *ProcessorTopologyStructurePtr;\r
\r
if (!Trace) {\r
return;\r
// Check if the values used to control the parsing logic have been\r
// successfully read.\r
if ((ProcessorTopologyStructureType == NULL) ||\r
- (ProcessorTopologyStructureLength == NULL)) {\r
+ (ProcessorTopologyStructureLength == NULL))\r
+ {\r
IncrementErrorCount ();\r
Print (\r
L"ERROR: Insufficient remaining table buffer length to read the " \\r
- L"processor topology structure header. Length = %d.\n",\r
+ L"processor topology structure header. Length = %d.\n",\r
AcpiTableLength - Offset\r
);\r
return;\r
\r
// Validate Processor Topology Structure length\r
if ((*ProcessorTopologyStructureLength == 0) ||\r
- ((Offset + (*ProcessorTopologyStructureLength)) > AcpiTableLength)) {\r
+ ((Offset + (*ProcessorTopologyStructureLength)) > AcpiTableLength))\r
+ {\r
IncrementErrorCount ();\r
Print (\r
L"ERROR: Invalid Processor Topology Structure length. " \\r
- L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",\r
+ L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",\r
*ProcessorTopologyStructureLength,\r
Offset,\r
AcpiTableLength\r
IncrementErrorCount ();\r
Print (\r
L"ERROR: Unknown processor topology structure:"\r
- L" Type = %d, Length = %d\n",\r
+ L" Type = %d, Length = %d\n",\r
*ProcessorTopologyStructureType,\r
*ProcessorTopologyStructureLength\r
);\r
}\r
\r
ProcessorTopologyStructurePtr += *ProcessorTopologyStructureLength;\r
- Offset += *ProcessorTopologyStructureLength;\r
+ Offset += *ProcessorTopologyStructureLength;\r
} // while\r
}\r
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