ShellPkg/Pci.c: Update supported link speed to PCI5.0

[mirror_edk2.git] / ShellPkg / Library / UefiShellDebug1CommandsLib / Pci.c

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index ba9caa774398b1191be8375eb9e816550f47c639..3e138188cec34d8e1f638a6d6c22e83faa687cd1 100644 (file)
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -1,7 +1,7 @@
 /** @file\r
   Main file for Pci shell Debug1 function.\r
 \r
-  Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>\r
   (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>\r
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
@@ -4515,8 +4515,14 @@ ExplainPcieLinkCap (
     case 3:\r
       MaxLinkSpeed = L"8.0 GT/s";\r
       break;\r
+    case 4:\r
+      MaxLinkSpeed = L"16.0 GT/s";\r
+      break;\r
+    case 5:\r
+      MaxLinkSpeed = L"32.0 GT/s";\r
+      break;\r
     default:\r
-      MaxLinkSpeed = L"Unknown";\r
+      MaxLinkSpeed = L"Reserved";\r
       break;\r
   }\r
   ShellPrintEx (-1, -1,\r
@@ -4672,6 +4678,12 @@ ExplainPcieLinkStatus (
     case 3:\r
       CurLinkSpeed = L"8.0 GT/s";\r
       break;\r
+    case 4:\r
+      CurLinkSpeed = L"16.0 GT/s";\r
+      break;\r
+    case 5:\r
+      CurLinkSpeed = L"32.0 GT/s";\r
+      break;\r
     default:\r
       CurLinkSpeed = L"Reserved";\r
       break;\r