+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-# AsmFuncs.S\r
-#\r
-# Abstract:\r
-#\r
-# Debug interrupt handle functions.\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-#include "DebugException.h"\r
-\r
-ASM_GLOBAL ASM_PFX(InterruptProcess)\r
-ASM_GLOBAL ASM_PFX(Exception0Handle)\r
-ASM_GLOBAL ASM_PFX(ExceptionStubHeaderSize)\r
-ASM_GLOBAL ASM_PFX(TimerInterruptHandle)\r
-ASM_GLOBAL ASM_PFX(CommonEntry)\r
-\r
-.macro AGENT_HANDLER_SIGNATURE\r
- .byte 0x41, 0x47, 0x54, 0x48 # AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')\r
-.endm\r
-\r
-.data\r
-\r
-ASM_PFX(ExceptionStubHeaderSize): .long ASM_PFX(Exception1Handle) - ASM_PFX(Exception0Handle)\r
-\r
-.text\r
-\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception0Handle):\r
- cli\r
- pushl %eax\r
- mov $0, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception1Handle):\r
- cli\r
- pushl %eax\r
- mov $1, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception2Handle):\r
- cli\r
- pushl %eax\r
- mov $2, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception3Handle):\r
- cli\r
- pushl %eax\r
- mov $3, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception4Handle):\r
- cli\r
- pushl %eax\r
- mov $4, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception5Handle):\r
- cli\r
- pushl %eax\r
- mov $5, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception6Handle):\r
- cli\r
- pushl %eax\r
- mov $6, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception7Handle):\r
- cli\r
- pushl %eax\r
- mov $7, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception8Handle):\r
- cli\r
- pushl %eax\r
- mov $8, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception9Handle):\r
- cli\r
- pushl %eax\r
- mov $9, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception10Handle):\r
- cli\r
- pushl %eax\r
- mov $10, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception11Handle):\r
- cli\r
- pushl %eax\r
- mov $11, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception12Handle):\r
- cli\r
- pushl %eax\r
- mov $12, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception13Handle):\r
- cli\r
- pushl %eax\r
- mov $13, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception14Handle):\r
- cli\r
- pushl %eax\r
- mov $14, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception15Handle):\r
- cli\r
- pushl %eax\r
- mov $15, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception16Handle):\r
- cli\r
- pushl %eax\r
- mov $16, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception17Handle):\r
- cli\r
- pushl %eax\r
- mov $17, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception18Handle):\r
- cli\r
- pushl %eax\r
- mov $18, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(Exception19Handle):\r
- cli\r
- pushl %eax\r
- mov $19, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-AGENT_HANDLER_SIGNATURE\r
-ASM_PFX(TimerInterruptHandle):\r
- cli\r
- pushl %eax\r
- mov $32, %eax\r
- jmp ASM_PFX(CommonEntry)\r
-\r
-\r
-ASM_PFX(CommonEntry):\r
-\r
-#---------------------------------------;\r
-# _CommonEntry ;\r
-#----------------------------------------------------------------------------;\r
-# The follow algorithm is used for the common interrupt routine.\r
-# Entry from each interrupt with a push eax and eax=interrupt number\r
-#\r
-# +---------------------+\r
-# + EFlags +\r
-# +---------------------+\r
-# + CS +\r
-# +---------------------+\r
-# + EIP +\r
-# +---------------------+\r
-# + Error Code +\r
-# +---------------------+\r
-# + EAX / Vector Number +\r
-# +---------------------+\r
-# + EBP +\r
-# +---------------------+ <-- EBP\r
-#\r
-\r
-# We need to determine if any extra data was pushed by the exception\r
- cmpl $DEBUG_EXCEPT_DOUBLE_FAULT, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_INVALID_TSS, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_SEG_NOT_PRESENT, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_STACK_FAULT, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_GP_FAULT, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_PAGE_FAULT, %eax\r
- je NoExtrPush\r
- cmpl $DEBUG_EXCEPT_ALIGNMENT_CHECK, %eax\r
- je NoExtrPush\r
-\r
- pushl (%esp)\r
- movl $0, 4(%esp)\r
-\r
-NoExtrPush:\r
-\r
- pushl %ebp\r
- movl %esp,%ebp\r
-\r
- #\r
- # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
- # is 16-byte aligned\r
- #\r
- andl $0xfffffff0,%esp\r
- subl $12,%esp\r
-\r
-## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
- pushl 0x4(%ebp)\r
- pushl %ebx\r
- pushl %ecx\r
- pushl %edx\r
- mov %eax, %ebx # save vector in ebx\r
- leal 24(%ebp),%ecx\r
- pushl %ecx # save original ESP\r
- pushl (%ebp)\r
- pushl %esi\r
- pushl %edi\r
-\r
-## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
-## insure FXSAVE/FXRSTOR is enabled in CR4...\r
-## ... while we're at it, make sure DE is also enabled...\r
- mov $1, %eax\r
- pushl %ebx # temporarily save value of ebx on stack\r
- cpuid # use CPUID to determine if FXSAVE/FXRESTOR\r
- # and DE are supported\r
- popl %ebx # retore value of ebx that was overwritten\r
- # by CPUID\r
- movl %cr4, %eax\r
- pushl %eax # push cr4 firstly\r
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
- jz L1\r
- orl $BIT9, %eax # Set CR4.OSFXSR\r
-L1:\r
- testl $BIT2, %edx # Test for Debugging Extensions support\r
- jz L2\r
- orl $BIT3, %eax # Set CR4.DE\r
-L2:\r
- movl %eax, %cr4\r
- movl %cr3, %eax\r
- pushl %eax\r
- movl %cr2, %eax\r
- pushl %eax\r
- xorl %eax,%eax\r
- pushl %eax\r
- movl %cr0, %eax\r
- pushl %eax\r
-\r
-## UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
- movl %ss,%eax\r
- pushl %eax\r
- movzwl 16(%ebp), %eax\r
- pushl %eax\r
- movl %ds,%eax\r
- pushl %eax\r
- movl %es,%eax\r
- pushl %eax\r
- movl %fs,%eax\r
- pushl %eax\r
- movl %gs,%eax\r
- pushl %eax\r
-\r
-## UINT32 Eip;\r
- pushl 12(%ebp)\r
-\r
-## UINT32 Gdtr[2], Idtr[2];\r
- subl $8,%esp\r
- sidt (%esp)\r
- subl $8,%esp\r
- sgdt (%esp)\r
-\r
-## UINT32 Ldtr, Tr;\r
- xorl %eax,%eax\r
- strl %eax\r
- pushl %eax\r
- sldtl %eax\r
- pushl %eax\r
-\r
-## UINT32 EFlags;\r
- pushl 20(%ebp)\r
-\r
-## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- movl %dr7, %eax\r
- pushl %eax\r
-## clear Dr7 while executing debugger itself\r
- xorl %eax,%eax\r
- movl %eax, %dr7\r
-\r
- movl %dr6, %eax\r
- pushl %eax\r
-## insure all status bits in dr6 are clear...\r
- xorl %eax,%eax\r
- movl %eax, %dr6\r
-\r
- movl %dr3, %eax\r
- pushl %eax\r
- movl %dr2, %eax\r
- pushl %eax\r
- movl %dr1, %eax\r
- pushl %eax\r
- movl %dr0, %eax\r
- pushl %eax\r
-\r
-## FX_SAVE_STATE_IA32 FxSaveState;\r
- subl $512,%esp\r
- movl %esp,%edi\r
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support.\r
- # edx still contains result from CPUID above\r
- jz L3\r
- .byte 0x0f, 0xae, 0x07 # fxsave [edi]\r
-L3:\r
-\r
-## save the exception data\r
- pushl 8(%esp)\r
-\r
-## Clear Direction Flag\r
- cld\r
-\r
-## Prepare parameter and call C function\r
- pushl %esp\r
- pushl %ebx\r
- call ASM_PFX(InterruptProcess)\r
- addl $8,%esp\r
-\r
-## skip the exception data\r
- addl $4,%esp\r
-\r
-## FX_SAVE_STATE_IA32 FxSaveState;\r
- movl %esp,%esi\r
- movl $1, %eax\r
- cpuid # use CPUID to determine if FXSAVE/FXRESTOR\r
- # are supported\r
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
- jz L4\r
- .byte 0x0f, 0xae, 0x0e # fxrstor [esi]\r
-L4:\r
- addl $512,%esp\r
-\r
-## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- popl %eax\r
- movl %eax, %dr0\r
- popl %eax\r
- movl %eax, %dr1\r
- popl %eax\r
- movl %eax, %dr2\r
- popl %eax\r
- movl %eax, %dr3\r
-## skip restore of dr6. We cleared dr6 during the context save.\r
- addl $4,%esp\r
- popl %eax\r
- movl %eax, %dr7\r
-\r
-## UINT32 EFlags;\r
- popl 20(%ebp)\r
-\r
-## UINT32 Ldtr, Tr;\r
-## UINT32 Gdtr[2], Idtr[2];\r
-## Best not let anyone mess with these particular registers...\r
- addl $24,%esp\r
-\r
-## UINT32 Eip;\r
- pop 12(%ebp)\r
-\r
-## UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
-## NOTE - modified segment registers could hang the debugger... We\r
-## could attempt to insulate ourselves against this possibility,\r
-## but that poses risks as well.\r
-##\r
- popl %gs\r
- popl %fs\r
- popl %es\r
- popl %ds\r
- popl 16(%ebp)\r
- popl %ss\r
-\r
-## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
- popl %eax\r
- movl %eax, %cr0\r
- addl $4,%esp # not for Cr1\r
- popl %eax\r
- movl %eax, %cr2\r
- popl %eax\r
- movl %eax, %cr3\r
- popl %eax\r
- movl %eax, %cr4\r
-\r
-## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
- popl %edi\r
- popl %esi\r
- addl $4,%esp # not for ebp\r
- addl $4,%esp # not for esp\r
- popl %edx\r
- popl %ecx\r
- popl %ebx\r
- popl %eax\r
-\r
- movl %ebp,%esp\r
- popl %ebp\r
- addl $8,%esp # skip eax\r
- iretl\r
-\r
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