;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
;; ... while we're at it, make sure DE is also enabled...\r
+ mov eax, 1\r
+ push ebx ; temporarily save value of ebx on stack \r
+ cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and\r
+ ; DE are supported\r
+ pop ebx ; retore value of ebx that was overwritten by CPUID \r
mov eax, cr4\r
- push eax ; push cr4 firstly\r
- or eax, 208h\r
+ push eax ; push cr4 firstly\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
+ jz @F\r
+ or eax, BIT9 ; Set CR4.OSFXSR\r
+@@: \r
+ test edx, BIT2 ; Test for Debugging Extensions support\r
+ jz @F\r
+ or eax, BIT3 ; Set CR4.DE\r
+@@: \r
mov cr4, eax\r
mov eax, cr3\r
push eax\r
mov ecx, 128 ;= 512 / 4\r
rep stosd\r
mov edi, esp\r
+\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.\r
+ ; edx still contains result from CPUID above\r
+ jz @F\r
db 0fh, 0aeh, 00000111y ;fxsave [edi]\r
+@@: \r
\r
;; save the exception data\r
push dword ptr [ebp + 8]\r
\r
;; FX_SAVE_STATE_IA32 FxSaveState;\r
mov esi, esp\r
+ mov eax, 1\r
+ cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
+ jz @F\r
db 0fh, 0aeh, 00001110y ; fxrstor [esi]\r
+@@: \r
add esp, 512\r
\r
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r