/** @file\r
- Supporting functions for x64 architecture.\r
+ Supporting functions for X64 architecture.\r
\r
- Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include "DebugAgent.h"\r
\r
-/**\r
- Read the offset of FP / MMX / XMM registers by register index.\r
-\r
- @param[in] Index Register index.\r
- @param[out] Width Register width returned.\r
-\r
- @return Offset in register address range.\r
-\r
-**/\r
-UINT16\r
-ArchReadFxStatOffset (\r
- IN UINT8 Index,\r
- OUT UINT8 *Width\r
- )\r
-{\r
- if (Index < SOFT_DEBUGGER_REGISTER_ST0) {\r
- switch (Index) {\r
- case SOFT_DEBUGGER_REGISTER_FP_FCW:\r
- *Width = (UINT8) sizeof (UINT16);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Fcw);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_FSW:\r
- *Width = (UINT8) sizeof (UINT16);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Fsw);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_FTW:\r
- *Width = (UINT8) sizeof (UINT16);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Ftw);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_OPCODE:\r
- *Width = (UINT8) sizeof (UINT16);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Opcode);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_EIP:\r
- *Width = (UINT8) sizeof (UINTN);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Rip);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET:\r
- *Width = (UINT8) sizeof (UINTN);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, DataOffset);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_MXCSR:\r
- *Width = (UINT8) sizeof (UINT32);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Mxcsr);\r
-\r
- case SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK:\r
- *Width = (UINT8) sizeof (UINT32);\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Mxcsr_Mask);\r
-\r
- default:\r
- return (UINT16) (-1);\r
- }\r
- }\r
-\r
- if (Index < SOFT_DEBUGGER_REGISTER_XMM0) {\r
- *Width = 10;\r
- } else if (Index < SOFT_DEBUGGER_REGISTER_MM0 ) {\r
- *Width = 16;\r
- } else {\r
- *Width = 8;\r
- Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;\r
- }\r
-\r
- return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, St0Mm0) + (Index - SOFT_DEBUGGER_REGISTER_ST0) * 16;\r
-}\r
-\r
-/**\r
- Write specified register into save CPU context.\r
-\r
- @param[in] CpuContext Pointer to saved CPU context.\r
- @param[in] Index Register index value.\r
- @param[in] Offset Offset in register address range\r
- @param[in] Width Data width to read.\r
- @param[in] RegisterBuffer Pointer to input buffer with data.\r
-\r
-**/\r
-VOID\r
-ArchWriteRegisterBuffer (\r
- IN DEBUG_CPU_CONTEXT *CpuContext,\r
- IN UINT8 Index,\r
- IN UINT8 Offset,\r
- IN UINT8 Width,\r
- IN UINT8 *RegisterBuffer\r
- )\r
-{\r
- UINT8 *Buffer;\r
- if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {\r
- Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_X64_FX_SAVE_STATE) + Index * 8;\r
- } else {\r
- //\r
- // If it is MMX register, adjust its index position\r
- //\r
- if (Index >= SOFT_DEBUGGER_REGISTER_MM0) {\r
- Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;\r
- }\r
-\r
- //\r
- // FPU/MMX/XMM registers\r
- //\r
- Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, &Width);\r
- }\r
-\r
- CopyMem (Buffer + Offset, RegisterBuffer, Width);\r
-}\r
-\r
-/**\r
- Read register value from saved CPU context.\r
-\r
- @param[in] CpuContext Pointer to saved CPU context.\r
- @param[in] Index Register index value.\r
- @param[in] Offset Offset in register address range\r
- @param[in] Width Data width to read.\r
-\r
- @return The address of register value.\r
-\r
-**/\r
-UINT8 *\r
-ArchReadRegisterBuffer (\r
- IN DEBUG_CPU_CONTEXT *CpuContext,\r
- IN UINT8 Index,\r
- IN UINT8 Offset,\r
- IN UINT8 *Width\r
- )\r
-{\r
- UINT8 *Buffer;\r
-\r
- if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {\r
- Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_X64_FX_SAVE_STATE) + Index * 8;\r
- if (*Width == 0) {\r
- *Width = (UINT8) sizeof (UINTN);\r
- }\r
- } else {\r
- //\r
- // FPU/MMX/XMM registers\r
- //\r
- Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, Width);\r
- }\r
-\r
- return Buffer;\r
-}\r
-\r
-/**\r
- Read group register of common registers.\r
-\r
- @param[in] CpuContext Pointer to saved CPU context.\r
- @param[in] RegisterGroup Pointer to Group registers.\r
-\r
-**/\r
-VOID\r
-ReadRegisterGroup (\r
- IN DEBUG_CPU_CONTEXT *CpuContext,\r
- IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP *RegisterGroup\r
- )\r
-{\r
- RegisterGroup->Cs = (UINT16) CpuContext->Cs;\r
- RegisterGroup->Ds = (UINT16) CpuContext->Ds;\r
- RegisterGroup->Es = (UINT16) CpuContext->Es;\r
- RegisterGroup->Fs = (UINT16) CpuContext->Fs;\r
- RegisterGroup->Gs = (UINT16) CpuContext->Gs;\r
- RegisterGroup->Ss = (UINT16) CpuContext->Ss;\r
- RegisterGroup->Eflags = (UINT32) CpuContext->Eflags;\r
- RegisterGroup->Rbp = CpuContext->Rbp;\r
- RegisterGroup->Eip = CpuContext->Eip;\r
- RegisterGroup->Rsp = CpuContext->Rsp;\r
- RegisterGroup->Eax = CpuContext->Rax;\r
- RegisterGroup->Rbx = CpuContext->Rbx;\r
- RegisterGroup->Rcx = CpuContext->Rcx;\r
- RegisterGroup->Rdx = CpuContext->Rdx;\r
- RegisterGroup->Rsi = CpuContext->Rsi;\r
- RegisterGroup->Rdi = CpuContext->Rdi;\r
- RegisterGroup->R8 = CpuContext->R8;\r
- RegisterGroup->R9 = CpuContext->R9;\r
- RegisterGroup->R10 = CpuContext->R10;\r
- RegisterGroup->R11 = CpuContext->R11;\r
- RegisterGroup->R12 = CpuContext->R12;\r
- RegisterGroup->R13 = CpuContext->R13;\r
- RegisterGroup->R14 = CpuContext->R14;\r
- RegisterGroup->R15 = CpuContext->R15;\r
- RegisterGroup->Dr0 = CpuContext->Dr0;\r
- RegisterGroup->Dr1 = CpuContext->Dr1;\r
- RegisterGroup->Dr2 = CpuContext->Dr2;\r
- RegisterGroup->Dr3 = CpuContext->Dr3;\r
- RegisterGroup->Dr6 = CpuContext->Dr6;\r
- RegisterGroup->Dr7 = CpuContext->Dr7;\r
- RegisterGroup->Cr0 = CpuContext->Cr0;\r
- RegisterGroup->Cr2 = CpuContext->Cr2;\r
- RegisterGroup->Cr3 = CpuContext->Cr3;\r
- RegisterGroup->Cr4 = CpuContext->Cr4;\r
- RegisterGroup->Cr8 = CpuContext->Cr8;\r
-\r
- CopyMem ((UINT8 *) &RegisterGroup->Xmm0[0], (UINT8 *) &CpuContext->FxSaveState.Xmm0[0], 16 * 10);\r
-}\r
-\r
/**\r
Initialize IDT entries to support source level debug.\r
\r
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);\r
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;\r
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
+\r
+ //\r
+ // Set DE flag in CR4 to enable IO breakpoint\r
+ //\r
+ AsmWriteCr4 (AsmReadCr4 () | BIT3);\r
}\r
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