/** @file\r
PE/Coff Extra Action library instances.\r
\r
- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
/**\r
Check if the hardware breakpoint in Drx is enabled by checking the Lx and Gx bit in Dr7.\r
- \r
+\r
It assumes that DebugAgent will set both Lx and Gx bit when setting up the hardware breakpoint.\r
\r
\r
Common routine to report the PE/COFF image loading/relocating or unloading event.\r
\r
If ImageContext is NULL, then ASSERT().\r
- \r
+\r
@param ImageContext Pointer to the image context structure that describes the\r
PE/COFF image.\r
@param Signature IMAGE_LOAD_SIGNATURE or IMAGE_UNLOAD_SIGNATURE.\r
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT) {\r
//\r
// If the CPU does not support Debug Extensions(CPUID:01 EDX:BIT2)\r
- // then force use of DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3 \r
+ // then force use of DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3\r
//\r
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);\r
if ((RegEdx & BIT2) == 0) {\r
IdtEntryHooked = TRUE;\r
}\r
}\r
- \r
+\r
//\r
// Save Debug Register State\r
//\r
\r
//\r
// Restore Debug Register State only when Host didn't change it inside exception handler.\r
- // E.g.: User halts the target and sets the HW breakpoint while target is \r
+ // E.g.: User halts the target and sets the HW breakpoint while target is\r
// in the above exception handler\r
//\r
NewDr7 = AsmReadDr7 () | BIT10; // H/w sets bit 10, some simulators don't\r