--- /dev/null
+/* $NetBSD: softfloat-specialize,v 1.8 2013/01/10 08:16:10 matt Exp $ */\r
+\r
+/* This is a derivative work. */\r
+\r
+/*\r
+===============================================================================\r
+\r
+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point\r
+Arithmetic Package, Release 2a.\r
+\r
+Written by John R. Hauser. This work was made possible in part by the\r
+International Computer Science Institute, located at Suite 600, 1947 Center\r
+Street, Berkeley, California 94704. Funding was partially provided by the\r
+National Science Foundation under grant MIP-9311980. The original version\r
+of this code was written as part of a project to build a fixed-point vector\r
+processor in collaboration with the University of California at Berkeley,\r
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information\r
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/\r
+arithmetic/SoftFloat.html'.\r
+\r
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort\r
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT\r
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO\r
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY\r
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.\r
+\r
+Derivative works are acceptable, even for commercial purposes, so long as\r
+(1) they include prominent notice that the work is derivative, and (2) they\r
+include prominent notice akin to these four paragraphs for those parts of\r
+this code that are retained.\r
+\r
+===============================================================================\r
+*/\r
+\r
+#include <signal.h>\r
+#include <string.h>\r
+#include <unistd.h>\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Underflow tininess-detection mode, statically initialized to default value.\r
+(The declaration in `softfloat.h' must match the `int8' type here.)\r
+-------------------------------------------------------------------------------\r
+*/\r
+#ifdef SOFTFLOAT_FOR_GCC\r
+static\r
+#endif\r
+int8 float_detect_tininess = float_tininess_after_rounding;\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Raises the exceptions specified by `flags'. Floating-point traps can be\r
+defined here if desired. It is currently not possible for such a trap to\r
+substitute a result value. If traps are not implemented, this routine\r
+should be simply `float_exception_flags |= flags;'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#ifdef SOFTFLOAT_FOR_GCC\r
+#ifndef set_float_exception_mask\r
+#define float_exception_mask _softfloat_float_exception_mask\r
+#endif\r
+#endif\r
+#ifndef set_float_exception_mask\r
+fp_except float_exception_mask = 0;\r
+#endif\r
+void\r
+float_raise( fp_except flags )\r
+{\r
+\r
+#if 0 // Don't raise exceptions\r
+ siginfo_t info;\r
+ fp_except mask = float_exception_mask;\r
+\r
+#ifdef set_float_exception_mask\r
+ flags |= set_float_exception_flags(flags, 0);\r
+#else\r
+ float_exception_flags |= flags;\r
+ flags = float_exception_flags;\r
+#endif\r
+\r
+ flags &= mask;\r
+ if ( flags ) {\r
+ memset(&info, 0, sizeof info);\r
+ info.si_signo = SIGFPE;\r
+ info.si_pid = getpid();\r
+ info.si_uid = geteuid();\r
+ if (flags & float_flag_underflow)\r
+ info.si_code = FPE_FLTUND;\r
+ else if (flags & float_flag_overflow)\r
+ info.si_code = FPE_FLTOVF;\r
+ else if (flags & float_flag_divbyzero)\r
+ info.si_code = FPE_FLTDIV;\r
+ else if (flags & float_flag_invalid)\r
+ info.si_code = FPE_FLTINV;\r
+ else if (flags & float_flag_inexact)\r
+ info.si_code = FPE_FLTRES;\r
+ sigqueueinfo(getpid(), &info);\r
+ }\r
+#else // Don't raise exceptions\r
+ float_exception_flags |= flags;\r
+#endif // Don't raise exceptions\r
+}\r
+#undef float_exception_mask\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Internal canonical NaN format.\r
+-------------------------------------------------------------------------------\r
+*/\r
+typedef struct {\r
+ flag sign;\r
+ bits64 high, low;\r
+} commonNaNT;\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+The pattern for a default generated single-precision NaN.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#define float32_default_nan 0xFFFFFFFF\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is a NaN;\r
+otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#ifdef SOFTFLOAT_FOR_GCC\r
+static\r
+#endif\r
+flag float32_is_nan( float32 a )\r
+{\r
+\r
+ return ( (bits32)0xFF000000 < (bits32) ( a<<1 ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is a signaling\r
+NaN; otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#if defined(SOFTFLOAT_FOR_GCC) && !defined(SOFTFLOATSPARC64_FOR_GCC) && \\r
+ !defined(SOFTFLOAT_M68K_FOR_GCC)\r
+static\r
+#endif\r
+flag float32_is_signaling_nan( float32 a )\r
+{\r
+\r
+ return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the single-precision floating-point NaN\r
+`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid\r
+exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static commonNaNT float32ToCommonNaN( float32 a )\r
+{\r
+ commonNaNT z;\r
+\r
+ if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );\r
+ z.sign = a>>31;\r
+ z.low = 0;\r
+ z.high = ( (bits64) a )<<41;\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the canonical NaN `a' to the single-\r
+precision floating-point format.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32 commonNaNToFloat32( commonNaNT a )\r
+{\r
+\r
+ return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | (bits32)( a.high>>41 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes two single-precision floating-point values `a' and `b', one of which\r
+is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a\r
+signaling NaN, the invalid exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32 propagateFloat32NaN( float32 a, float32 b )\r
+{\r
+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;\r
+\r
+ aIsNaN = float32_is_nan( a );\r
+ aIsSignalingNaN = float32_is_signaling_nan( a );\r
+ bIsNaN = float32_is_nan( b );\r
+ bIsSignalingNaN = float32_is_signaling_nan( b );\r
+ a |= 0x00400000;\r
+ b |= 0x00400000;\r
+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );\r
+ if ( aIsNaN ) {\r
+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;\r
+ }\r
+ else {\r
+ return b;\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+The pattern for a default generated double-precision NaN.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is a NaN;\r
+otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#ifdef SOFTFLOAT_FOR_GCC\r
+static\r
+#endif\r
+flag float64_is_nan( float64 a )\r
+{\r
+\r
+ return ( (bits64)LIT64( 0xFFE0000000000000 ) <\r
+ (bits64) ( FLOAT64_DEMANGLE(a)<<1 ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is a signaling\r
+NaN; otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#if defined(SOFTFLOAT_FOR_GCC) && !defined(SOFTFLOATSPARC64_FOR_GCC) && \\r
+ !defined(SOFTFLOATM68K_FOR_GCC)\r
+static\r
+#endif\r
+flag float64_is_signaling_nan( float64 a )\r
+{\r
+\r
+ return\r
+ ( ( ( FLOAT64_DEMANGLE(a)>>51 ) & 0xFFF ) == 0xFFE )\r
+ && ( FLOAT64_DEMANGLE(a) & LIT64( 0x0007FFFFFFFFFFFF ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the double-precision floating-point NaN\r
+`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid\r
+exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static commonNaNT float64ToCommonNaN( float64 a )\r
+{\r
+ commonNaNT z;\r
+\r
+ if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );\r
+ z.sign = (flag)(FLOAT64_DEMANGLE(a)>>63);\r
+ z.low = 0;\r
+ z.high = FLOAT64_DEMANGLE(a)<<12;\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the canonical NaN `a' to the double-\r
+precision floating-point format.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64 commonNaNToFloat64( commonNaNT a )\r
+{\r
+\r
+ return FLOAT64_MANGLE(\r
+ ( ( (bits64) a.sign )<<63 )\r
+ | LIT64( 0x7FF8000000000000 )\r
+ | ( a.high>>12 ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes two double-precision floating-point values `a' and `b', one of which\r
+is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a\r
+signaling NaN, the invalid exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64 propagateFloat64NaN( float64 a, float64 b )\r
+{\r
+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;\r
+\r
+ aIsNaN = float64_is_nan( a );\r
+ aIsSignalingNaN = float64_is_signaling_nan( a );\r
+ bIsNaN = float64_is_nan( b );\r
+ bIsSignalingNaN = float64_is_signaling_nan( b );\r
+ a |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));\r
+ b |= FLOAT64_MANGLE(LIT64( 0x0008000000000000 ));\r
+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );\r
+ if ( aIsNaN ) {\r
+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;\r
+ }\r
+ else {\r
+ return b;\r
+ }\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+The pattern for a default generated extended double-precision NaN. The\r
+`high' and `low' values hold the most- and least-significant bits,\r
+respectively.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#define floatx80_default_nan_high 0xFFFF\r
+#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the extended double-precision floating-point value `a' is a\r
+NaN; otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag floatx80_is_nan( floatx80 a )\r
+{\r
+\r
+ return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the extended double-precision floating-point value `a' is a\r
+signaling NaN; otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag floatx80_is_signaling_nan( floatx80 a )\r
+{\r
+ bits64 aLow;\r
+\r
+ aLow = a.low & ~ LIT64( 0x4000000000000000 );\r
+ return\r
+ ( ( a.high & 0x7FFF ) == 0x7FFF )\r
+ && (bits64) ( aLow<<1 )\r
+ && ( a.low == aLow );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the extended double-precision floating-\r
+point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the\r
+invalid exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static commonNaNT floatx80ToCommonNaN( floatx80 a )\r
+{\r
+ commonNaNT z;\r
+\r
+ if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );\r
+ z.sign = a.high>>15;\r
+ z.low = 0;\r
+ z.high = a.low<<1;\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the canonical NaN `a' to the extended\r
+double-precision floating-point format.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static floatx80 commonNaNToFloatx80( commonNaNT a )\r
+{\r
+ floatx80 z;\r
+\r
+ z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );\r
+ z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes two extended double-precision floating-point values `a' and `b', one\r
+of which is a NaN, and returns the appropriate NaN result. If either `a' or\r
+`b' is a signaling NaN, the invalid exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )\r
+{\r
+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;\r
+\r
+ aIsNaN = floatx80_is_nan( a );\r
+ aIsSignalingNaN = floatx80_is_signaling_nan( a );\r
+ bIsNaN = floatx80_is_nan( b );\r
+ bIsSignalingNaN = floatx80_is_signaling_nan( b );\r
+ a.low |= LIT64( 0xC000000000000000 );\r
+ b.low |= LIT64( 0xC000000000000000 );\r
+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );\r
+ if ( aIsNaN ) {\r
+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;\r
+ }\r
+ else {\r
+ return b;\r
+ }\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+The pattern for a default generated quadruple-precision NaN. The `high' and\r
+`low' values hold the most- and least-significant bits, respectively.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )\r
+#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the quadruple-precision floating-point value `a' is a NaN;\r
+otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float128_is_nan( float128 a )\r
+{\r
+\r
+ return\r
+ ( (bits64)LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )\r
+ && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the quadruple-precision floating-point value `a' is a\r
+signaling NaN; otherwise returns 0.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float128_is_signaling_nan( float128 a )\r
+{\r
+\r
+ return\r
+ ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )\r
+ && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the quadruple-precision floating-point NaN\r
+`a' to the canonical NaN format. If `a' is a signaling NaN, the invalid\r
+exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static commonNaNT float128ToCommonNaN( float128 a )\r
+{\r
+ commonNaNT z;\r
+\r
+ if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );\r
+ z.sign = (flag)(a.high>>63);\r
+ shortShift128Left( a.high, a.low, 16, &z.high, &z.low );\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the canonical NaN `a' to the quadruple-\r
+precision floating-point format.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float128 commonNaNToFloat128( commonNaNT a )\r
+{\r
+ float128 z;\r
+\r
+ shift128Right( a.high, a.low, 16, &z.high, &z.low );\r
+ z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes two quadruple-precision floating-point values `a' and `b', one of\r
+which is a NaN, and returns the appropriate NaN result. If either `a' or\r
+`b' is a signaling NaN, the invalid exception is raised.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float128 propagateFloat128NaN( float128 a, float128 b )\r
+{\r
+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;\r
+\r
+ aIsNaN = float128_is_nan( a );\r
+ aIsSignalingNaN = float128_is_signaling_nan( a );\r
+ bIsNaN = float128_is_nan( b );\r
+ bIsSignalingNaN = float128_is_signaling_nan( b );\r
+ a.high |= LIT64( 0x0000800000000000 );\r
+ b.high |= LIT64( 0x0000800000000000 );\r
+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );\r
+ if ( aIsNaN ) {\r
+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;\r
+ }\r
+ else {\r
+ return b;\r
+ }\r
+\r
+}\r
+\r
+#endif\r
+\r
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