MdeModulePkg DXE Core: Add Idle event during BootServices WaitForEvent

[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.c

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 35fba39b43aeb192cbf3f0ac9dffbaf00d946f01..04d76a5cebe886b361b3499604b626abc7c24c97 100644 (file)
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -1,7 +1,7 @@
 /** @file\r
   CPU DXE Module.\r
 \r
-  Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -114,6 +114,14 @@ UINT32 mErrorCodeFlag = 0x00027d00;
 //\r
 // Local function prototypes\r
 //\r
+\r
+/**\r
+  Set Interrupt Descriptor Table Handler Address.\r
+\r
+  @param Index        The Index of the interrupt descriptor table handle.\r
+  @param Handler      Handler address.\r
+\r
+**/\r
 VOID\r
 SetInterruptDescriptorTableHandlerAddress (\r
   IN UINTN Index,\r
@@ -573,19 +581,28 @@ CpuGetTimerValue (
 \r
 \r
 /**\r
-  Set memory cacheability attributes for given range of memeory.\r
-\r
-  @param  This                   Protocol instance structure\r
-  @param  BaseAddress            Specifies the start address of the\r
-                                 memory range\r
-  @param  Length                 Specifies the length of the memory range\r
-  @param  Attributes             The memory cacheability for the memory range\r
-\r
-  @retval EFI_SUCCESS            If the cacheability of that memory range is\r
-                                 set successfully\r
-  @retval EFI_UNSUPPORTED        If the desired operation cannot be done\r
-  @retval EFI_INVALID_PARAMETER  The input parameter is not correct,\r
-                                 such as Length = 0\r
+  Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.\r
+\r
+  This function modifies the attributes for the memory region specified by BaseAddress and\r
+  Length from their current attributes to the attributes specified by Attributes.\r
+\r
+  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
+  @param  BaseAddress      The physical address that is the start address of a memory region.\r
+  @param  Length           The size in bytes of the memory region.\r
+  @param  Attributes       The bit mask of attributes to set for the memory region.\r
+\r
+  @retval EFI_SUCCESS           The attributes were set for the memory region.\r
+  @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by\r
+                                BaseAddress and Length cannot be modified.\r
+  @retval EFI_INVALID_PARAMETER Length is zero.\r
+                                Attributes specified an illegal combination of attributes that\r
+                                cannot be set together.\r
+  @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of\r
+                                the memory resource range.\r
+  @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory\r
+                                resource range specified by BaseAddress and Length.\r
+                                The bit mask of attributes is not support for the memory resource\r
+                                range specified by BaseAddress and Length.\r
 \r
 **/\r
 EFI_STATUS\r
@@ -604,8 +621,6 @@ CpuSetMemoryAttributes (
     return EFI_UNSUPPORTED;\r
   }\r
 \r
-  DEBUG((EFI_D_ERROR, "CpuAp: SetMemorySpaceAttributes(BA=%08x, Len=%08x, Attr=%08x)\n", BaseAddress, Length, Attributes));\r
-\r
   //\r
   // If this function is called because GCD SetMemorySpaceAttributes () is called\r
   // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory\r
@@ -638,21 +653,24 @@ CpuSetMemoryAttributes (
     CacheType = CacheWriteBack;\r
     break;\r
 \r
-  default:\r
+  case EFI_MEMORY_UCE:\r
+  case EFI_MEMORY_RP:\r
+  case EFI_MEMORY_XP:\r
+  case EFI_MEMORY_RUNTIME:\r
     return EFI_UNSUPPORTED;\r
+\r
+  default:\r
+    return EFI_INVALID_PARAMETER;\r
   }\r
   //\r
   // call MTRR libary function\r
   //\r
-  DEBUG((EFI_D_ERROR, "  MtrrSetMemoryAttribute()\n"));\r
-  Status = MtrrSetMemoryAttribute(\r
+  Status = MtrrSetMemoryAttribute (\r
              BaseAddress,\r
              Length,\r
              CacheType\r
              );\r
 \r
-  MtrrDebugPrintAllMtrrs ();\r
-\r
   return (EFI_STATUS) Status;\r
 }\r
 \r
@@ -1014,7 +1032,13 @@ RefreshGcdMemoryAttributes (
   mIsFlushingGCD = FALSE;\r
 }\r
 \r
+/**\r
+  Set Interrupt Descriptor Table Handler Address.\r
+\r
+  @param Index        The Index of the interrupt descriptor table handle.\r
+  @param Handler      Handler address.\r
 \r
+**/\r
 VOID\r
 SetInterruptDescriptorTableHandlerAddress (\r
   IN UINTN Index,\r
@@ -1068,7 +1092,7 @@ InitInterruptDescriptorTable (
 \r
   if ((OldIdtPtr.Base != 0) && ((OldIdtPtr.Limit & 7) == 7)) {\r
     OldIdt = (IA32_IDT_GATE_DESCRIPTOR*) OldIdtPtr.Base;\r
-    OldIdtSize = (OldIdtPtr.Limit + 1) / 8;\r
+    OldIdtSize = (OldIdtPtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);\r
   } else {\r
     OldIdt = NULL;\r
     OldIdtSize = 0;\r
@@ -1117,7 +1141,7 @@ InitInterruptDescriptorTable (
   //\r
   // Initialize Exception Handlers\r
   //\r
-  for (Index = 0; Index < 32; Index++) {\r
+  for (Index = OldIdtSize; Index < 32; Index++) {\r
     Status = CpuRegisterInterruptHandler (&gCpu, Index, CommonExceptionHandler);\r
     ASSERT_EFI_ERROR (Status);\r
   }\r