/** @file\r
CPU Exception Library provides PEI/DXE/SMM CPU common exception handler.\r
\r
-Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
RESERVED_VECTORS_DATA *ReservedVectors;\r
\r
ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
- SetMem ((VOID *)ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM, 0xff);\r
+ SetMem ((VOID *)ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * ExceptionHandlerData->IdtEntryCount, 0xff);\r
if (VectorInfo != NULL) {\r
- Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, CPU_EXCEPTION_NUM);\r
+ Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, ExceptionHandlerData->IdtEntryCount);\r
if (EFI_ERROR (Status)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
}\r
\r
//\r
- // Read IDT descriptor and calculate IDT size\r
+ // Setup the exception handlers according to IDT size, but no more than\r
+ // ExceptionHandlerData->IdtEntryCount (32 in PEI and SMM, 256 in DXE) handlers.\r
//\r
AsmReadIdtr (&IdtDescriptor);\r
- IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);\r
- if (IdtEntryCount > CPU_EXCEPTION_NUM) {\r
- //\r
- // CPU exception library only setup CPU_EXCEPTION_NUM exception handler at most\r
- //\r
- IdtEntryCount = CPU_EXCEPTION_NUM;\r
- }\r
+ IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);\r
+ ExceptionHandlerData->IdtEntryCount = MIN (IdtEntryCount, ExceptionHandlerData->IdtEntryCount);\r
\r
IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;\r
AsmGetTemplateAddressMap (&TemplateMap);\r
ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);\r
\r
- ExceptionHandlerData->IdtEntryCount = IdtEntryCount;\r
UpdateIdtTable (IdtTable, &TemplateMap, ExceptionHandlerData);\r
\r
return EFI_SUCCESS;\r