/** @file\r
CPU MP Initialize Library common functions.\r
\r
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
+ Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "MpLib.h"\r
+#include <Library/VmgExitLib.h>\r
+#include <Register/Amd/Fam17Msr.h>\r
+#include <Register/Amd/Ghcb.h>\r
\r
EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;\r
\r
+\r
/**\r
The function will check if BSP Execute Disable is enabled.\r
- DxeIpl may have enabled Execute Disable for BSP,\r
- APs need to get the status and sync up the settings.\r
+\r
+ DxeIpl may have enabled Execute Disable for BSP, APs need to\r
+ get the status and sync up the settings.\r
+ If BSP's CR0.Paging is not set, BSP execute Disble feature is\r
+ not working actually.\r
\r
@retval TRUE BSP Execute Disable is enabled.\r
@retval FALSE BSP Execute Disable is not enabled.\r
CPUID_EXTENDED_CPU_SIG_EDX Edx;\r
MSR_IA32_EFER_REGISTER EferMsr;\r
BOOLEAN Enabled;\r
+ IA32_CR0 Cr0;\r
\r
Enabled = FALSE;\r
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
- if (Eax >= CPUID_EXTENDED_CPU_SIG) {\r
- AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
+ Cr0.UintN = AsmReadCr0 ();\r
+ if (Cr0.Bits.PG != 0) {\r
//\r
- // CPUID 0x80000001\r
- // Bit 20: Execute Disable Bit available.\r
+ // If CR0 Paging bit is set\r
//\r
- if (Edx.Bits.NX != 0) {\r
- EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);\r
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
+ if (Eax >= CPUID_EXTENDED_CPU_SIG) {\r
+ AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
//\r
- // MSR 0xC0000080\r
- // Bit 11: Execute Disable Bit enable.\r
+ // CPUID 0x80000001\r
+ // Bit 20: Execute Disable Bit available.\r
//\r
- if (EferMsr.Bits.NXE != 0) {\r
- Enabled = TRUE;\r
+ if (Edx.Bits.NX != 0) {\r
+ EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);\r
+ //\r
+ // MSR 0xC0000080\r
+ // Bit 11: Execute Disable Bit enable.\r
+ //\r
+ if (EferMsr.Bits.NXE != 0) {\r
+ Enabled = TRUE;\r
+ }\r
}\r
}\r
}\r
return Enabled;\r
}\r
\r
-/**\r
- Get CPU Package/Core/Thread location information.\r
-\r
- @param[in] InitialApicId CPU APIC ID\r
- @param[out] Location Pointer to CPU location information\r
-**/\r
-VOID\r
-ExtractProcessorLocation (\r
- IN UINT32 InitialApicId,\r
- OUT EFI_CPU_PHYSICAL_LOCATION *Location\r
- )\r
-{\r
- BOOLEAN TopologyLeafSupported;\r
- UINTN ThreadBits;\r
- UINTN CoreBits;\r
- CPUID_VERSION_INFO_EBX VersionInfoEbx;\r
- CPUID_VERSION_INFO_EDX VersionInfoEdx;\r
- CPUID_CACHE_PARAMS_EAX CacheParamsEax;\r
- CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax;\r
- CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx;\r
- CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx;\r
- UINT32 MaxCpuIdIndex;\r
- UINT32 SubIndex;\r
- UINTN LevelType;\r
- UINT32 MaxLogicProcessorsPerPackage;\r
- UINT32 MaxCoresPerPackage;\r
-\r
- //\r
- // Check if the processor is capable of supporting more than one logical processor.\r
- //\r
- AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);\r
- if (VersionInfoEdx.Bits.HTT == 0) {\r
- Location->Thread = 0;\r
- Location->Core = 0;\r
- Location->Package = 0;\r
- return;\r
- }\r
-\r
- ThreadBits = 0;\r
- CoreBits = 0;\r
-\r
- //\r
- // Assume three-level mapping of APIC ID: Package:Core:SMT.\r
- //\r
-\r
- TopologyLeafSupported = FALSE;\r
- //\r
- // Get the max index of basic CPUID\r
- //\r
- AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);\r
-\r
- //\r
- // If the extended topology enumeration leaf is available, it\r
- // is the preferred mechanism for enumerating topology.\r
- //\r
- if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {\r
- AsmCpuidEx (\r
- CPUID_EXTENDED_TOPOLOGY,\r
- 0,\r
- &ExtendedTopologyEax.Uint32,\r
- &ExtendedTopologyEbx.Uint32,\r
- &ExtendedTopologyEcx.Uint32,\r
- NULL\r
- );\r
- //\r
- // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for\r
- // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not\r
- // supported on that processor.\r
- //\r
- if (ExtendedTopologyEbx.Uint32 != 0) {\r
- TopologyLeafSupported = TRUE;\r
-\r
- //\r
- // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract\r
- // the SMT sub-field of x2APIC ID.\r
- //\r
- LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
- ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);\r
- ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;\r
-\r
- //\r
- // Software must not assume any "level type" encoding\r
- // value to be related to any sub-leaf index, except sub-leaf 0.\r
- //\r
- SubIndex = 1;\r
- do {\r
- AsmCpuidEx (\r
- CPUID_EXTENDED_TOPOLOGY,\r
- SubIndex,\r
- &ExtendedTopologyEax.Uint32,\r
- NULL,\r
- &ExtendedTopologyEcx.Uint32,\r
- NULL\r
- );\r
- LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
- if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {\r
- CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;\r
- break;\r
- }\r
- SubIndex++;\r
- } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);\r
- }\r
- }\r
-\r
- if (!TopologyLeafSupported) {\r
- AsmCpuid (CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);\r
- MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;\r
- if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {\r
- AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);\r
- MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;\r
- } else {\r
- //\r
- // Must be a single-core processor.\r
- //\r
- MaxCoresPerPackage = 1;\r
- }\r
-\r
- ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);\r
- CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);\r
- }\r
-\r
- Location->Thread = InitialApicId & ((1 << ThreadBits) - 1);\r
- Location->Core = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);\r
- Location->Package = (InitialApicId >> (ThreadBits + CoreBits));\r
-}\r
-\r
/**\r
Worker function for SwitchBSP().\r
\r
ReleaseSpinLock (&CpuData->ApLock);\r
}\r
\r
+/**\r
+ Save BSP's local APIC timer setting.\r
+\r
+ @param[in] CpuMpData Pointer to CPU MP Data\r
+**/\r
+VOID\r
+SaveLocalApicTimerSetting (\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ //\r
+ // Record the current local APIC timer setting of BSP\r
+ //\r
+ GetApicTimerState (\r
+ &CpuMpData->DivideValue,\r
+ &CpuMpData->PeriodicMode,\r
+ &CpuMpData->Vector\r
+ );\r
+ CpuMpData->CurrentTimerCount = GetApicTimerCurrentCount ();\r
+ CpuMpData->TimerInterruptState = GetApicTimerInterruptState ();\r
+}\r
+\r
+/**\r
+ Sync local APIC timer setting from BSP to AP.\r
+\r
+ @param[in] CpuMpData Pointer to CPU MP Data\r
+**/\r
+VOID\r
+SyncLocalApicTimerSetting (\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ //\r
+ // Sync local APIC timer setting from BSP to AP\r
+ //\r
+ InitializeApicTimer (\r
+ CpuMpData->DivideValue,\r
+ CpuMpData->CurrentTimerCount,\r
+ CpuMpData->PeriodicMode,\r
+ CpuMpData->Vector\r
+ );\r
+ //\r
+ // Disable AP's local APIC timer interrupt\r
+ //\r
+ DisableApicTimerInterrupt ();\r
+}\r
+\r
/**\r
Save the volatile registers required to be restored following INIT IPI.\r
\r
VolatileRegisters->Dr6 = AsmReadDr6 ();\r
VolatileRegisters->Dr7 = AsmReadDr7 ();\r
}\r
+\r
+ AsmReadGdtr (&VolatileRegisters->Gdtr);\r
+ AsmReadIdtr (&VolatileRegisters->Idtr);\r
+ VolatileRegisters->Tr = AsmReadTr ();\r
}\r
\r
/**\r
)\r
{\r
CPUID_VERSION_INFO_EDX VersionInfoEdx;\r
+ IA32_TSS_DESCRIPTOR *Tss;\r
\r
- AsmWriteCr0 (VolatileRegisters->Cr0);\r
AsmWriteCr3 (VolatileRegisters->Cr3);\r
AsmWriteCr4 (VolatileRegisters->Cr4);\r
+ AsmWriteCr0 (VolatileRegisters->Cr0);\r
\r
if (IsRestoreDr) {\r
AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);\r
AsmWriteDr7 (VolatileRegisters->Dr7);\r
}\r
}\r
+\r
+ AsmWriteGdtr (&VolatileRegisters->Gdtr);\r
+ AsmWriteIdtr (&VolatileRegisters->Idtr);\r
+ if (VolatileRegisters->Tr != 0 &&\r
+ VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {\r
+ Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +\r
+ VolatileRegisters->Tr);\r
+ if (Tss->Bits.P == 1) {\r
+ Tss->Bits.Type &= 0xD; // 1101 - Clear busy bit just in case\r
+ AsmWriteTr (VolatileRegisters->Tr);\r
+ }\r
+ }\r
}\r
\r
/**\r
//\r
ApLoopMode = ApInHltLoop;\r
}\r
+\r
+ if (PcdGetBool (PcdSevEsIsEnabled)) {\r
+ //\r
+ // For SEV-ES, force AP in Hlt-loop mode in order to use the GHCB\r
+ // protocol for starting APs\r
+ //\r
+ ApLoopMode = ApInHltLoop;\r
+ }\r
}\r
\r
if (ApLoopMode != ApInMwaitLoop) {\r
UINTN Index2;\r
UINTN Index3;\r
UINT32 ApicId;\r
- CPU_AP_DATA CpuData;\r
+ CPU_INFO_IN_HOB CpuInfo;\r
UINT32 ApCount;\r
CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ volatile UINT32 *StartupApSignal;\r
\r
ApCount = CpuMpData->CpuCount - 1;\r
-\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
if (ApCount != 0) {\r
for (Index1 = 0; Index1 < ApCount; Index1++) {\r
Index3 = Index1;\r
//\r
// Sort key is the hardware default APIC ID\r
//\r
- ApicId = CpuMpData->CpuData[Index1].ApicId;\r
+ ApicId = CpuInfoInHob[Index1].ApicId;\r
for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {\r
- if (ApicId > CpuMpData->CpuData[Index2].ApicId) {\r
+ if (ApicId > CpuInfoInHob[Index2].ApicId) {\r
Index3 = Index2;\r
- ApicId = CpuMpData->CpuData[Index2].ApicId;\r
+ ApicId = CpuInfoInHob[Index2].ApicId;\r
}\r
}\r
if (Index3 != Index1) {\r
- CopyMem (&CpuData, &CpuMpData->CpuData[Index3], sizeof (CPU_AP_DATA));\r
+ CopyMem (&CpuInfo, &CpuInfoInHob[Index3], sizeof (CPU_INFO_IN_HOB));\r
CopyMem (\r
- &CpuMpData->CpuData[Index3],\r
- &CpuMpData->CpuData[Index1],\r
- sizeof (CPU_AP_DATA)\r
+ &CpuInfoInHob[Index3],\r
+ &CpuInfoInHob[Index1],\r
+ sizeof (CPU_INFO_IN_HOB)\r
);\r
- CopyMem (&CpuMpData->CpuData[Index1], &CpuData, sizeof (CPU_AP_DATA));\r
+ CopyMem (&CpuInfoInHob[Index1], &CpuInfo, sizeof (CPU_INFO_IN_HOB));\r
+\r
+ //\r
+ // Also exchange the StartupApSignal.\r
+ //\r
+ StartupApSignal = CpuMpData->CpuData[Index3].StartupApSignal;\r
+ CpuMpData->CpuData[Index3].StartupApSignal =\r
+ CpuMpData->CpuData[Index1].StartupApSignal;\r
+ CpuMpData->CpuData[Index1].StartupApSignal = StartupApSignal;\r
}\r
}\r
\r
//\r
ApicId = GetInitialApicId ();\r
for (Index1 = 0; Index1 < CpuMpData->CpuCount; Index1++) {\r
- if (CpuMpData->CpuData[Index1].ApicId == ApicId) {\r
+ if (CpuInfoInHob[Index1].ApicId == ApicId) {\r
CpuMpData->BspNumber = (UINT32) Index1;\r
break;\r
}\r
}\r
-\r
- CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
- for (Index1 = 0; Index1 < CpuMpData->CpuCount; Index1++) {\r
- CpuInfoInHob[Index1].InitialApicId = CpuMpData->CpuData[Index1].InitialApicId;\r
- CpuInfoInHob[Index1].ApicId = CpuMpData->CpuData[Index1].ApicId;\r
- CpuInfoInHob[Index1].Health = CpuMpData->CpuData[Index1].Health;\r
- }\r
}\r
}\r
\r
)\r
{\r
CPU_MP_DATA *CpuMpData;\r
+ UINTN ProcessorNumber;\r
+ EFI_STATUS Status;\r
\r
CpuMpData = (CPU_MP_DATA *) Buffer;\r
+ Status = GetProcessorNumber (CpuMpData, &ProcessorNumber);\r
+ ASSERT_EFI_ERROR (Status);\r
//\r
- // Sync BSP's MTRR table to AP\r
+ // Load microcode on AP\r
//\r
- MtrrSetAllMtrrs (&CpuMpData->MtrrTable);\r
+ MicrocodeDetect (CpuMpData, ProcessorNumber);\r
//\r
- // Load microcode on AP\r
+ // Sync BSP's MTRR table to AP\r
//\r
- MicrocodeDetect (CpuMpData);\r
+ MtrrSetAllMtrrs (&CpuMpData->MtrrTable);\r
}\r
\r
/**\r
Find the current Processor number by APIC ID.\r
\r
- @param[in] CpuMpData Pointer to PEI CPU MP Data\r
- @param[in] ProcessorNumber Return the pocessor number found\r
+ @param[in] CpuMpData Pointer to PEI CPU MP Data\r
+ @param[out] ProcessorNumber Return the pocessor number found\r
\r
@retval EFI_SUCCESS ProcessorNumber is found and returned.\r
@retval EFI_NOT_FOUND ProcessorNumber is not found.\r
{\r
UINTN TotalProcessorNumber;\r
UINTN Index;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ UINT32 CurrentApicId;\r
+\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
\r
TotalProcessorNumber = CpuMpData->CpuCount;\r
+ CurrentApicId = GetApicId ();\r
for (Index = 0; Index < TotalProcessorNumber; Index ++) {\r
- if (CpuMpData->CpuData[Index].ApicId == GetApicId ()) {\r
+ if (CpuInfoInHob[Index].ApicId == CurrentApicId) {\r
*ProcessorNumber = Index;\r
return EFI_SUCCESS;\r
}\r
}\r
+\r
return EFI_NOT_FOUND;\r
}\r
\r
IN CPU_MP_DATA *CpuMpData\r
)\r
{\r
+ UINTN Index;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ BOOLEAN X2Apic;\r
+\r
//\r
// Send 1st broadcast IPI to APs to wakeup APs\r
//\r
- CpuMpData->InitFlag = ApInitConfig;\r
- CpuMpData->X2ApicEnable = FALSE;\r
- WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL);\r
- //\r
- // Wait for AP task to complete and then exit.\r
- //\r
- MicroSecondDelay (PcdGet32(PcdCpuApInitTimeOutInMicroSeconds));\r
+ CpuMpData->InitFlag = ApInitConfig;\r
+ WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL, TRUE);\r
CpuMpData->InitFlag = ApInitDone;\r
ASSERT (CpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
//\r
CpuPause ();\r
}\r
\r
- if (CpuMpData->X2ApicEnable) {\r
+\r
+ //\r
+ // Enable x2APIC mode if\r
+ // 1. Number of CPU is greater than 255; or\r
+ // 2. There are any logical processors reporting an Initial APIC ID of 255 or greater.\r
+ //\r
+ X2Apic = FALSE;\r
+ if (CpuMpData->CpuCount > 255) {\r
+ //\r
+ // If there are more than 255 processor found, force to enable X2APIC\r
+ //\r
+ X2Apic = TRUE;\r
+ } else {\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ if (CpuInfoInHob[Index].InitialApicId >= 0xFF) {\r
+ X2Apic = TRUE;\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+ if (X2Apic) {\r
DEBUG ((DEBUG_INFO, "Force x2APIC mode!\n"));\r
//\r
// Wakeup all APs to enable x2APIC mode\r
//\r
- WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL, TRUE);\r
//\r
// Wait for all known APs finished\r
//\r
// Enable x2APIC on BSP\r
//\r
SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+ //\r
+ // Set BSP/Aps state to IDLE\r
+ //\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);\r
+ }\r
}\r
DEBUG ((DEBUG_INFO, "APIC MODE is %d\n", GetApicMode ()));\r
//\r
return CpuMpData->CpuCount;\r
}\r
\r
-/*\r
+/**\r
Initialize CPU AP Data when AP is wakeup at the first time.\r
\r
@param[in, out] CpuMpData Pointer to PEI CPU MP Data\r
@param[in] ProcessorNumber The handle number of processor\r
@param[in] BistData Processor BIST data\r
+ @param[in] ApTopOfStack Top of AP stack\r
\r
**/\r
VOID\r
InitializeApData (\r
IN OUT CPU_MP_DATA *CpuMpData,\r
IN UINTN ProcessorNumber,\r
- IN UINT32 BistData\r
+ IN UINT32 BistData,\r
+ IN UINT64 ApTopOfStack\r
)\r
{\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;\r
+\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
+ CpuInfoInHob[ProcessorNumber].InitialApicId = GetInitialApicId ();\r
+ CpuInfoInHob[ProcessorNumber].ApicId = GetApicId ();\r
+ CpuInfoInHob[ProcessorNumber].Health = BistData;\r
+ CpuInfoInHob[ProcessorNumber].ApTopOfStack = ApTopOfStack;\r
+\r
CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;\r
- CpuMpData->CpuData[ProcessorNumber].Health = BistData;\r
CpuMpData->CpuData[ProcessorNumber].CpuHealthy = (BistData == 0) ? TRUE : FALSE;\r
- CpuMpData->CpuData[ProcessorNumber].ApicId = GetApicId ();\r
- CpuMpData->CpuData[ProcessorNumber].InitialApicId = GetInitialApicId ();\r
- if (CpuMpData->CpuData[ProcessorNumber].InitialApicId >= 0xFF) {\r
- //\r
- // Set x2APIC mode if there are any logical processor reporting\r
- // an Initial APIC ID of 255 or greater.\r
- //\r
- AcquireSpinLock(&CpuMpData->MpLock);\r
- CpuMpData->X2ApicEnable = TRUE;\r
- ReleaseSpinLock(&CpuMpData->MpLock);\r
+\r
+ //\r
+ // NOTE: PlatformId is not relevant on AMD platforms.\r
+ //\r
+ if (!StandardSignatureIsAuthenticAMD ()) {\r
+ PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
+ CpuMpData->CpuData[ProcessorNumber].PlatformId = (UINT8)PlatformIdMsr.Bits.PlatformId;\r
}\r
\r
+ AsmCpuid (\r
+ CPUID_VERSION_INFO,\r
+ &CpuMpData->CpuData[ProcessorNumber].ProcessorSignature,\r
+ NULL,\r
+ NULL,\r
+ NULL\r
+ );\r
+\r
InitializeSpinLock(&CpuMpData->CpuData[ProcessorNumber].ApLock);\r
SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);\r
}\r
\r
+/**\r
+ Get Protected mode code segment with 16-bit default addressing\r
+ from current GDT table.\r
+\r
+ @return Protected mode 16-bit code segment value.\r
+**/\r
+STATIC\r
+UINT16\r
+GetProtectedMode16CS (\r
+ VOID\r
+ )\r
+{\r
+ IA32_DESCRIPTOR GdtrDesc;\r
+ IA32_SEGMENT_DESCRIPTOR *GdtEntry;\r
+ UINTN GdtEntryCount;\r
+ UINT16 Index;\r
+\r
+ Index = (UINT16) -1;\r
+ AsmReadGdtr (&GdtrDesc);\r
+ GdtEntryCount = (GdtrDesc.Limit + 1) / sizeof (IA32_SEGMENT_DESCRIPTOR);\r
+ GdtEntry = (IA32_SEGMENT_DESCRIPTOR *) GdtrDesc.Base;\r
+ for (Index = 0; Index < GdtEntryCount; Index++) {\r
+ if (GdtEntry->Bits.L == 0 &&\r
+ GdtEntry->Bits.DB == 0 &&\r
+ GdtEntry->Bits.Type > 8) {\r
+ break;\r
+ }\r
+ GdtEntry++;\r
+ }\r
+ ASSERT (Index != GdtEntryCount);\r
+ return Index * 8;\r
+}\r
+\r
+/**\r
+ Get Protected mode code segment with 32-bit default addressing\r
+ from current GDT table.\r
+\r
+ @return Protected mode 32-bit code segment value.\r
+**/\r
+STATIC\r
+UINT16\r
+GetProtectedMode32CS (\r
+ VOID\r
+ )\r
+{\r
+ IA32_DESCRIPTOR GdtrDesc;\r
+ IA32_SEGMENT_DESCRIPTOR *GdtEntry;\r
+ UINTN GdtEntryCount;\r
+ UINT16 Index;\r
+\r
+ Index = (UINT16) -1;\r
+ AsmReadGdtr (&GdtrDesc);\r
+ GdtEntryCount = (GdtrDesc.Limit + 1) / sizeof (IA32_SEGMENT_DESCRIPTOR);\r
+ GdtEntry = (IA32_SEGMENT_DESCRIPTOR *) GdtrDesc.Base;\r
+ for (Index = 0; Index < GdtEntryCount; Index++) {\r
+ if (GdtEntry->Bits.L == 0 &&\r
+ GdtEntry->Bits.DB == 1 &&\r
+ GdtEntry->Bits.Type > 8) {\r
+ break;\r
+ }\r
+ GdtEntry++;\r
+ }\r
+ ASSERT (Index != GdtEntryCount);\r
+ return Index * 8;\r
+}\r
+\r
+/**\r
+ Reset an AP when in SEV-ES mode.\r
+\r
+ If successful, this function never returns.\r
+\r
+ @param[in] Ghcb Pointer to the GHCB\r
+ @param[in] CpuMpData Pointer to CPU MP Data\r
+\r
+**/\r
+STATIC\r
+VOID\r
+MpInitLibSevEsAPReset (\r
+ IN GHCB *Ghcb,\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ UINT16 Code16, Code32;\r
+ AP_RESET *APResetFn;\r
+ UINTN BufferStart;\r
+ UINTN StackStart;\r
+\r
+ Code16 = GetProtectedMode16CS ();\r
+ Code32 = GetProtectedMode32CS ();\r
+\r
+ if (CpuMpData->WakeupBufferHigh != 0) {\r
+ APResetFn = (AP_RESET *) (CpuMpData->WakeupBufferHigh + CpuMpData->AddressMap.SwitchToRealNoNxOffset);\r
+ } else {\r
+ APResetFn = (AP_RESET *) (CpuMpData->MpCpuExchangeInfo->BufferStart + CpuMpData->AddressMap.SwitchToRealOffset);\r
+ }\r
+\r
+ BufferStart = CpuMpData->MpCpuExchangeInfo->BufferStart;\r
+ StackStart = CpuMpData->SevEsAPResetStackStart -\r
+ (AP_RESET_STACK_SIZE * GetApicId ());\r
+\r
+ //\r
+ // This call never returns.\r
+ //\r
+ APResetFn (BufferStart, Code16, Code32, StackStart);\r
+}\r
+\r
/**\r
This function will be called from AP reset code if BSP uses WakeUpAP.\r
\r
@param[in] ExchangeInfo Pointer to the MP exchange info buffer\r
- @param[in] NumApsExecuting Number of current executing AP\r
+ @param[in] ApIndex Number of current executing AP\r
**/\r
VOID\r
EFIAPI\r
ApWakeupFunction (\r
IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,\r
- IN UINTN NumApsExecuting\r
+ IN UINTN ApIndex\r
)\r
{\r
CPU_MP_DATA *CpuMpData;\r
VOID *Parameter;\r
UINT32 BistData;\r
volatile UINT32 *ApStartupSignalBuffer;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ UINT64 ApTopOfStack;\r
+ UINTN CurrentApicMode;\r
\r
//\r
// AP finished assembly code and begin to execute C code\r
//\r
CpuMpData = ExchangeInfo->CpuMpData;\r
\r
- ProgramVirtualWireMode (); \r
+ //\r
+ // AP's local APIC settings will be lost after received INIT IPI\r
+ // We need to re-initialize them at here\r
+ //\r
+ ProgramVirtualWireMode ();\r
+ //\r
+ // Mask the LINT0 and LINT1 so that AP doesn't enter the system timer interrupt handler.\r
+ //\r
+ DisableLvtInterrupts ();\r
+ SyncLocalApicTimerSetting (CpuMpData);\r
\r
+ CurrentApicMode = GetApicMode ();\r
while (TRUE) {\r
if (CpuMpData->InitFlag == ApInitConfig) {\r
//\r
// Add CPU number\r
//\r
InterlockedIncrement ((UINT32 *) &CpuMpData->CpuCount);\r
- ProcessorNumber = NumApsExecuting;\r
+ ProcessorNumber = ApIndex;\r
//\r
// This is first time AP wakeup, get BIST information from AP stack\r
//\r
- BistData = *(UINT32 *) (CpuMpData->Buffer + ProcessorNumber * CpuMpData->CpuApStackSize - sizeof (UINTN));\r
- //\r
- // Do some AP initialize sync\r
+ ApTopOfStack = CpuMpData->Buffer + (ProcessorNumber + 1) * CpuMpData->CpuApStackSize;\r
+ BistData = *(UINT32 *) ((UINTN) ApTopOfStack - sizeof (UINTN));\r
//\r
- ApInitializeSync (CpuMpData);\r
- //\r
- // Sync BSP's Control registers to APs\r
+ // CpuMpData->CpuData[0].VolatileRegisters is initialized based on BSP environment,\r
+ // to initialize AP in InitConfig path.\r
+ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a different IDT shared by all APs.\r
//\r
RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
- InitializeApData (CpuMpData, ProcessorNumber, BistData);\r
+ InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack);\r
ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
+\r
+ //\r
+ // Delay decrementing the APs executing count when SEV-ES is enabled\r
+ // to allow the APs to issue an AP_RESET_HOLD before the BSP possibly\r
+ // performs another INIT-SIPI-SIPI sequence.\r
+ //\r
+ if (!CpuMpData->SevEsIsEnabled) {\r
+ InterlockedDecrement ((UINT32 *) &CpuMpData->MpCpuExchangeInfo->NumApsExecuting);\r
+ }\r
} else {\r
//\r
// Execute AP function if AP is ready\r
WAKEUP_AP_SIGNAL,\r
0\r
);\r
- if (CpuMpData->ApLoopMode == ApInHltLoop) {\r
+\r
+ if (CpuMpData->InitFlag == ApInitReconfig) {\r
//\r
- // Restore AP's volatile registers saved\r
+ // ApInitReconfig happens when:\r
+ // 1. AP is re-enabled after it's disabled, in either PEI or DXE phase.\r
+ // 2. AP is initialized in DXE phase.\r
+ // In either case, use the volatile registers value derived from BSP.\r
+ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a\r
+ // different IDT shared by all APs.\r
//\r
- RestoreVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
+ } else {\r
+ if (CpuMpData->ApLoopMode == ApInHltLoop) {\r
+ //\r
+ // Restore AP's volatile registers saved before AP is halted\r
+ //\r
+ RestoreVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ } else {\r
+ //\r
+ // The CPU driver might not flush TLB for APs on spot after updating\r
+ // page attributes. AP in mwait loop mode needs to take care of it when\r
+ // woken up.\r
+ //\r
+ CpuFlushTlb ();\r
+ }\r
}\r
\r
if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateReady) {\r
if (Procedure != NULL) {\r
SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateBusy);\r
//\r
+ // Enable source debugging on AP function\r
+ //\r
+ EnableDebugAgent ();\r
+ //\r
// Invoke AP function here\r
//\r
Procedure (Parameter);\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
if (CpuMpData->SwitchBspFlag) {\r
//\r
// Re-get the processor number due to BSP/AP maybe exchange in AP function\r
GetProcessorNumber (CpuMpData, &ProcessorNumber);\r
CpuMpData->CpuData[ProcessorNumber].ApFunction = 0;\r
CpuMpData->CpuData[ProcessorNumber].ApFunctionArgument = 0;\r
+ ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
+ CpuInfoInHob[ProcessorNumber].ApTopOfStack = CpuInfoInHob[CpuMpData->NewBspNumber].ApTopOfStack;\r
} else {\r
- //\r
- // Re-get the CPU APICID and Initial APICID\r
- //\r
- CpuMpData->CpuData[ProcessorNumber].ApicId = GetApicId ();\r
- CpuMpData->CpuData[ProcessorNumber].InitialApicId = GetInitialApicId ();\r
+ if (CpuInfoInHob[ProcessorNumber].ApicId != GetApicId () ||\r
+ CpuInfoInHob[ProcessorNumber].InitialApicId != GetInitialApicId ()) {\r
+ if (CurrentApicMode != GetApicMode ()) {\r
+ //\r
+ // If APIC mode change happened during AP function execution,\r
+ // we do not support APIC ID value changed.\r
+ //\r
+ ASSERT (FALSE);\r
+ CpuDeadLoop ();\r
+ } else {\r
+ //\r
+ // Re-get the CPU APICID and Initial APICID if they are changed\r
+ //\r
+ CpuInfoInHob[ProcessorNumber].ApicId = GetApicId ();\r
+ CpuInfoInHob[ProcessorNumber].InitialApicId = GetInitialApicId ();\r
+ }\r
+ }\r
}\r
}\r
SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateFinished);\r
//\r
while (TRUE) {\r
DisableInterrupts ();\r
- CpuSleep ();\r
+ if (CpuMpData->SevEsIsEnabled) {\r
+ MSR_SEV_ES_GHCB_REGISTER Msr;\r
+ GHCB *Ghcb;\r
+ UINT64 Status;\r
+ BOOLEAN DoDecrement;\r
+\r
+ DoDecrement = (BOOLEAN) (CpuMpData->InitFlag == ApInitConfig);\r
+\r
+ while (TRUE) {\r
+ Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);\r
+ Ghcb = Msr.Ghcb;\r
+\r
+ VmgInit (Ghcb);\r
+\r
+ if (DoDecrement) {\r
+ DoDecrement = FALSE;\r
+\r
+ //\r
+ // Perform the delayed decrement just before issuing the first\r
+ // VMGEXIT with AP_RESET_HOLD.\r
+ //\r
+ InterlockedDecrement ((UINT32 *) &CpuMpData->MpCpuExchangeInfo->NumApsExecuting);\r
+ }\r
+\r
+ Status = VmgExit (Ghcb, SVM_EXIT_AP_RESET_HOLD, 0, 0);\r
+ if ((Status == 0) && (Ghcb->SaveArea.SwExitInfo2 != 0)) {\r
+ VmgDone (Ghcb);\r
+ break;\r
+ }\r
+\r
+ VmgDone (Ghcb);\r
+ }\r
+\r
+ //\r
+ // Awakened in a new phase? Use the new CpuMpData\r
+ //\r
+ if (CpuMpData->NewCpuMpData != NULL) {\r
+ CpuMpData = CpuMpData->NewCpuMpData;\r
+ }\r
+\r
+ MpInitLibSevEsAPReset (Ghcb, CpuMpData);\r
+ } else {\r
+ CpuSleep ();\r
+ }\r
CpuPause ();\r
}\r
}\r
)\r
{\r
volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Size;\r
+ IA32_SEGMENT_DESCRIPTOR *Selector;\r
+ IA32_CR4 Cr4;\r
\r
ExchangeInfo = CpuMpData->MpCpuExchangeInfo;\r
ExchangeInfo->Lock = 0;\r
ExchangeInfo->Cr3 = AsmReadCr3 ();\r
\r
ExchangeInfo->CFunction = (UINTN) ApWakeupFunction;\r
+ ExchangeInfo->ApIndex = 0;\r
ExchangeInfo->NumApsExecuting = 0;\r
+ ExchangeInfo->InitFlag = (UINTN) CpuMpData->InitFlag;\r
+ ExchangeInfo->CpuInfo = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
ExchangeInfo->CpuMpData = CpuMpData;\r
\r
ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();\r
\r
+ ExchangeInfo->InitializeFloatingPointUnitsAddress = (UINTN)InitializeFloatingPointUnits;\r
+\r
+ //\r
+ // We can check either CPUID(7).ECX[bit16] or check CR4.LA57[bit12]\r
+ // to determin whether 5-Level Paging is enabled.\r
+ // CPUID(7).ECX[bit16] shows CPU's capability, CR4.LA57[bit12] shows\r
+ // current system setting.\r
+ // Using latter way is simpler because it also eliminates the needs to\r
+ // check whether platform wants to enable it.\r
+ //\r
+ Cr4.UintN = AsmReadCr4 ();\r
+ ExchangeInfo->Enable5LevelPaging = (BOOLEAN) (Cr4.Bits.LA57 == 1);\r
+ DEBUG ((DEBUG_INFO, "%a: 5-Level Paging = %d\n", gEfiCallerBaseName, ExchangeInfo->Enable5LevelPaging));\r
+\r
+ ExchangeInfo->SevEsIsEnabled = CpuMpData->SevEsIsEnabled;\r
+ ExchangeInfo->GhcbBase = (UINTN) CpuMpData->GhcbBase;\r
+\r
//\r
// Get the BSP's data of GDT and IDT\r
//\r
AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r
AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
+\r
+ //\r
+ // Find a 32-bit code segment\r
+ //\r
+ Selector = (IA32_SEGMENT_DESCRIPTOR *)ExchangeInfo->GdtrProfile.Base;\r
+ Size = ExchangeInfo->GdtrProfile.Limit + 1;\r
+ while (Size > 0) {\r
+ if (Selector->Bits.L == 0 && Selector->Bits.Type >= 8) {\r
+ ExchangeInfo->ModeTransitionSegment =\r
+ (UINT16)((UINTN)Selector - ExchangeInfo->GdtrProfile.Base);\r
+ break;\r
+ }\r
+ Selector += 1;\r
+ Size -= sizeof (IA32_SEGMENT_DESCRIPTOR);\r
+ }\r
+\r
+ //\r
+ // Copy all 32-bit code and 64-bit code into memory with type of\r
+ // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.\r
+ //\r
+ if (CpuMpData->WakeupBufferHigh != 0) {\r
+ Size = CpuMpData->AddressMap.RendezvousFunnelSize +\r
+ CpuMpData->AddressMap.SwitchToRealSize -\r
+ CpuMpData->AddressMap.ModeTransitionOffset;\r
+ CopyMem (\r
+ (VOID *)CpuMpData->WakeupBufferHigh,\r
+ CpuMpData->AddressMap.RendezvousFunnelAddress +\r
+ CpuMpData->AddressMap.ModeTransitionOffset,\r
+ Size\r
+ );\r
+\r
+ ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;\r
+ } else {\r
+ ExchangeInfo->ModeTransitionMemory = (UINT32)\r
+ (ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset);\r
+ }\r
+\r
+ ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory +\r
+ (UINT32)ExchangeInfo->ModeOffset -\r
+ (UINT32)CpuMpData->AddressMap.ModeTransitionOffset;\r
+ ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment;\r
}\r
\r
/**\r
- This function will be called by BSP to wakeup AP.\r
+ Helper function that waits until the finished AP count reaches the specified\r
+ limit, or the specified timeout elapses (whichever comes first).\r
\r
- @param[in] CpuMpData Pointer to CPU MP Data\r
- @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
- FALSE: Send IPI to AP by ApicId\r
- @param[in] ProcessorNumber The handle number of specified processor\r
- @param[in] Procedure The function to be invoked by AP\r
- @param[in] ProcedureArgument The argument to be passed into AP function\r
+ @param[in] CpuMpData Pointer to CPU MP Data.\r
+ @param[in] FinishedApLimit The number of finished APs to wait for.\r
+ @param[in] TimeLimit The number of microseconds to wait for.\r
**/\r
VOID\r
-WakeUpAP (\r
+TimedWaitForApFinish (\r
IN CPU_MP_DATA *CpuMpData,\r
- IN BOOLEAN Broadcast,\r
- IN UINTN ProcessorNumber,\r
- IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
- IN VOID *ProcedureArgument OPTIONAL\r
+ IN UINT32 FinishedApLimit,\r
+ IN UINT32 TimeLimit\r
+ );\r
+\r
+/**\r
+ Get available system memory below 1MB by specified size.\r
+\r
+ @param[in] CpuMpData The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+BackupAndPrepareWakeupBuffer(\r
+ IN CPU_MP_DATA *CpuMpData\r
)\r
{\r
- volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
- UINTN Index;\r
- CPU_AP_DATA *CpuData;\r
- BOOLEAN ResetVectorRequired;\r
-\r
- CpuMpData->FinishedCount = 0;\r
- ResetVectorRequired = FALSE;\r
+ CopyMem (\r
+ (VOID *) CpuMpData->BackupBuffer,\r
+ (VOID *) CpuMpData->WakeupBuffer,\r
+ CpuMpData->BackupBufferSize\r
+ );\r
+ CopyMem (\r
+ (VOID *) CpuMpData->WakeupBuffer,\r
+ (VOID *) CpuMpData->AddressMap.RendezvousFunnelAddress,\r
+ CpuMpData->AddressMap.RendezvousFunnelSize +\r
+ CpuMpData->AddressMap.SwitchToRealSize\r
+ );\r
+}\r
\r
- if (CpuMpData->ApLoopMode == ApInHltLoop ||\r
- CpuMpData->InitFlag != ApInitDone) {\r
- ResetVectorRequired = TRUE;\r
- AllocateResetVector (CpuMpData);\r
- FillExchangeInfoData (CpuMpData);\r
- } else if (CpuMpData->ApLoopMode == ApInMwaitLoop) {\r
- //\r
- // Get AP target C-state each time when waking up AP,\r
- // for it maybe updated by platform again\r
- //\r
- CpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
- }\r
+/**\r
+ Restore wakeup buffer data.\r
+\r
+ @param[in] CpuMpData The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+RestoreWakeupBuffer(\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ CopyMem (\r
+ (VOID *) CpuMpData->WakeupBuffer,\r
+ (VOID *) CpuMpData->BackupBuffer,\r
+ CpuMpData->BackupBufferSize\r
+ );\r
+}\r
+\r
+/**\r
+ Calculate the size of the reset stack.\r
+\r
+ @return Total amount of memory required for stacks\r
+**/\r
+STATIC\r
+UINTN\r
+GetApResetStackSize (\r
+ VOID\r
+ )\r
+{\r
+ return AP_RESET_STACK_SIZE * PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
+}\r
+\r
+/**\r
+ Calculate the size of the reset vector.\r
+\r
+ @param[in] AddressMap The pointer to Address Map structure.\r
+\r
+ @return Total amount of memory required for the AP reset area\r
+**/\r
+STATIC\r
+UINTN\r
+GetApResetVectorSize (\r
+ IN MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
+ )\r
+{\r
+ UINTN Size;\r
+\r
+ Size = ALIGN_VALUE (AddressMap->RendezvousFunnelSize +\r
+ AddressMap->SwitchToRealSize +\r
+ sizeof (MP_CPU_EXCHANGE_INFO),\r
+ CPU_STACK_ALIGNMENT);\r
+ Size += GetApResetStackSize ();\r
+\r
+ return Size;\r
+}\r
+\r
+/**\r
+ Allocate reset vector buffer.\r
+\r
+ @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+AllocateResetVector (\r
+ IN OUT CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ UINTN ApResetVectorSize;\r
+\r
+ if (CpuMpData->WakeupBuffer == (UINTN) -1) {\r
+ ApResetVectorSize = GetApResetVectorSize (&CpuMpData->AddressMap);\r
+\r
+ CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSize);\r
+ CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN)\r
+ (CpuMpData->WakeupBuffer +\r
+ CpuMpData->AddressMap.RendezvousFunnelSize +\r
+ CpuMpData->AddressMap.SwitchToRealSize);\r
+ CpuMpData->WakeupBufferHigh = GetModeTransitionBuffer (\r
+ CpuMpData->AddressMap.RendezvousFunnelSize +\r
+ CpuMpData->AddressMap.SwitchToRealSize -\r
+ CpuMpData->AddressMap.ModeTransitionOffset\r
+ );\r
+ //\r
+ // The reset stack starts at the end of the buffer.\r
+ //\r
+ CpuMpData->SevEsAPResetStackStart = CpuMpData->WakeupBuffer + ApResetVectorSize;\r
+ }\r
+ BackupAndPrepareWakeupBuffer (CpuMpData);\r
+}\r
+\r
+/**\r
+ Free AP reset vector buffer.\r
+\r
+ @param[in] CpuMpData The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+FreeResetVector (\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ //\r
+ // If SEV-ES is enabled, the reset area is needed for AP parking and\r
+ // and AP startup in the OS, so the reset area is reserved. Do not\r
+ // perform the restore as this will overwrite memory which has data\r
+ // needed by SEV-ES.\r
+ //\r
+ if (!CpuMpData->SevEsIsEnabled) {\r
+ RestoreWakeupBuffer (CpuMpData);\r
+ }\r
+}\r
+\r
+/**\r
+ Allocate the SEV-ES AP jump table buffer.\r
+\r
+ @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+AllocateSevEsAPMemory (\r
+ IN OUT CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ if (CpuMpData->SevEsAPBuffer == (UINTN) -1) {\r
+ CpuMpData->SevEsAPBuffer =\r
+ CpuMpData->SevEsIsEnabled ? GetSevEsAPMemory () : 0;\r
+ }\r
+}\r
+\r
+/**\r
+ Program the SEV-ES AP jump table buffer.\r
+\r
+ @param[in] SipiVector The SIPI vector used for the AP Reset\r
+**/\r
+VOID\r
+SetSevEsJumpTable (\r
+ IN UINTN SipiVector\r
+ )\r
+{\r
+ SEV_ES_AP_JMP_FAR *JmpFar;\r
+ UINT32 Offset, InsnByte;\r
+ UINT8 LoNib, HiNib;\r
+\r
+ JmpFar = (SEV_ES_AP_JMP_FAR *) FixedPcdGet32 (PcdSevEsWorkAreaBase);\r
+ ASSERT (JmpFar != NULL);\r
+\r
+ //\r
+ // Obtain the address of the Segment/Rip location in the workarea.\r
+ // This will be set to a value derived from the SIPI vector and will\r
+ // be the memory address used for the far jump below.\r
+ //\r
+ Offset = FixedPcdGet32 (PcdSevEsWorkAreaBase);\r
+ Offset += sizeof (JmpFar->InsnBuffer);\r
+ LoNib = (UINT8) Offset;\r
+ HiNib = (UINT8) (Offset >> 8);\r
+\r
+ //\r
+ // Program the workarea (which is the initial AP boot address) with\r
+ // far jump to the SIPI vector (where XX and YY represent the\r
+ // address of where the SIPI vector is stored.\r
+ //\r
+ // JMP FAR [CS:XXYY] => 2E FF 2E YY XX\r
+ //\r
+ InsnByte = 0;\r
+ JmpFar->InsnBuffer[InsnByte++] = 0x2E; // CS override prefix\r
+ JmpFar->InsnBuffer[InsnByte++] = 0xFF; // JMP (FAR)\r
+ JmpFar->InsnBuffer[InsnByte++] = 0x2E; // ModRM (JMP memory location)\r
+ JmpFar->InsnBuffer[InsnByte++] = LoNib; // YY offset ...\r
+ JmpFar->InsnBuffer[InsnByte++] = HiNib; // XX offset ...\r
+\r
+ //\r
+ // Program the Segment/Rip based on the SIPI vector (always at least\r
+ // 16-byte aligned, so Rip is set to 0).\r
+ //\r
+ JmpFar->Rip = 0;\r
+ JmpFar->Segment = (UINT16) (SipiVector >> 4);\r
+}\r
+\r
+/**\r
+ This function will be called by BSP to wakeup AP.\r
+\r
+ @param[in] CpuMpData Pointer to CPU MP Data\r
+ @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
+ FALSE: Send IPI to AP by ApicId\r
+ @param[in] ProcessorNumber The handle number of specified processor\r
+ @param[in] Procedure The function to be invoked by AP\r
+ @param[in] ProcedureArgument The argument to be passed into AP function\r
+ @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
+**/\r
+VOID\r
+WakeUpAP (\r
+ IN CPU_MP_DATA *CpuMpData,\r
+ IN BOOLEAN Broadcast,\r
+ IN UINTN ProcessorNumber,\r
+ IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
+ IN VOID *ProcedureArgument, OPTIONAL\r
+ IN BOOLEAN WakeUpDisabledAps\r
+ )\r
+{\r
+ volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Index;\r
+ CPU_AP_DATA *CpuData;\r
+ BOOLEAN ResetVectorRequired;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+\r
+ CpuMpData->FinishedCount = 0;\r
+ ResetVectorRequired = FALSE;\r
+\r
+ if (CpuMpData->WakeUpByInitSipiSipi ||\r
+ CpuMpData->InitFlag != ApInitDone) {\r
+ ResetVectorRequired = TRUE;\r
+ AllocateResetVector (CpuMpData);\r
+ AllocateSevEsAPMemory (CpuMpData);\r
+ FillExchangeInfoData (CpuMpData);\r
+ SaveLocalApicTimerSetting (CpuMpData);\r
+ }\r
+\r
+ if (CpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Get AP target C-state each time when waking up AP,\r
+ // for it maybe updated by platform again\r
+ //\r
+ CpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
+ }\r
\r
ExchangeInfo = CpuMpData->MpCpuExchangeInfo;\r
\r
for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
if (Index != CpuMpData->BspNumber) {\r
CpuData = &CpuMpData->CpuData[Index];\r
+ //\r
+ // All AP(include disabled AP) will be woke up by INIT-SIPI-SIPI, but\r
+ // the AP procedure will be skipped for disabled AP because AP state\r
+ // is not CpuStateReady.\r
+ //\r
+ if (GetApState (CpuData) == CpuStateDisabled && !WakeUpDisabledAps) {\r
+ continue;\r
+ }\r
+\r
CpuData->ApFunction = (UINTN) Procedure;\r
CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
SetApState (CpuData, CpuStateReady);\r
}\r
}\r
}\r
- if (ResetVectorRequired) {\r
+ if (ResetVectorRequired) {\r
+ //\r
+ // For SEV-ES, the initial AP boot address will be defined by\r
+ // PcdSevEsWorkAreaBase. The Segment/Rip must be the jump address\r
+ // from the original INIT-SIPI-SIPI.\r
+ //\r
+ if (CpuMpData->SevEsIsEnabled) {\r
+ SetSevEsJumpTable (ExchangeInfo->BufferStart);\r
+ }\r
+\r
+ //\r
+ // Wakeup all APs\r
+ //\r
+ SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ }\r
+ if (CpuMpData->InitFlag == ApInitConfig) {\r
+ if (PcdGet32 (PcdCpuBootLogicalProcessorNumber) > 0) {\r
+ //\r
+ // The AP enumeration algorithm below is suitable only when the\r
+ // platform can tell us the *exact* boot CPU count in advance.\r
+ //\r
+ // The wait below finishes only when the detected AP count reaches\r
+ // (PcdCpuBootLogicalProcessorNumber - 1), regardless of how long that\r
+ // takes. If at least one AP fails to check in (meaning a platform\r
+ // hardware bug), the detection hangs forever, by design. If the actual\r
+ // boot CPU count in the system is higher than\r
+ // PcdCpuBootLogicalProcessorNumber (meaning a platform\r
+ // misconfiguration), then some APs may complete initialization after\r
+ // the wait finishes, and cause undefined behavior.\r
+ //\r
+ TimedWaitForApFinish (\r
+ CpuMpData,\r
+ PcdGet32 (PcdCpuBootLogicalProcessorNumber) - 1,\r
+ MAX_UINT32 // approx. 71 minutes\r
+ );\r
+ } else {\r
+ //\r
+ // The AP enumeration algorithm below is suitable for two use cases.\r
+ //\r
+ // (1) The check-in time for an individual AP is bounded, and APs run\r
+ // through their initialization routines strongly concurrently. In\r
+ // particular, the number of concurrently running APs\r
+ // ("NumApsExecuting") is never expected to fall to zero\r
+ // *temporarily* -- it is expected to fall to zero only when all\r
+ // APs have checked-in.\r
+ //\r
+ // In this case, the platform is supposed to set\r
+ // PcdCpuApInitTimeOutInMicroSeconds to a low-ish value (just long\r
+ // enough for one AP to start initialization). The timeout will be\r
+ // reached soon, and remaining APs are collected by watching\r
+ // NumApsExecuting fall to zero. If NumApsExecuting falls to zero\r
+ // mid-process, while some APs have not completed initialization,\r
+ // the behavior is undefined.\r
+ //\r
+ // (2) The check-in time for an individual AP is unbounded, and/or APs\r
+ // may complete their initializations widely spread out. In\r
+ // particular, some APs may finish initialization before some APs\r
+ // even start.\r
+ //\r
+ // In this case, the platform is supposed to set\r
+ // PcdCpuApInitTimeOutInMicroSeconds to a high-ish value. The AP\r
+ // enumeration will always take that long (except when the boot CPU\r
+ // count happens to be maximal, that is,\r
+ // PcdCpuMaxLogicalProcessorNumber). All APs are expected to\r
+ // check-in before the timeout, and NumApsExecuting is assumed zero\r
+ // at timeout. APs that miss the time-out may cause undefined\r
+ // behavior.\r
+ //\r
+ TimedWaitForApFinish (\r
+ CpuMpData,\r
+ PcdGet32 (PcdCpuMaxLogicalProcessorNumber) - 1,\r
+ PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds)\r
+ );\r
+\r
+ while (CpuMpData->MpCpuExchangeInfo->NumApsExecuting != 0) {\r
+ CpuPause();\r
+ }\r
+ }\r
+ } else {\r
+ //\r
+ // Wait all APs waken up if this is not the 1st broadcast of SIPI\r
+ //\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ CpuData = &CpuMpData->CpuData[Index];\r
+ if (Index != CpuMpData->BspNumber) {\r
+ WaitApWakeup (CpuData->StartupApSignal);\r
+ }\r
+ }\r
+ }\r
+ } else {\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ CpuData->ApFunction = (UINTN) Procedure;\r
+ CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
+ SetApState (CpuData, CpuStateReady);\r
+ //\r
+ // Wakeup specified AP\r
+ //\r
+ ASSERT (CpuMpData->InitFlag != ApInitConfig);\r
+ *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;\r
+ if (ResetVectorRequired) {\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
+\r
+ //\r
+ // For SEV-ES, the initial AP boot address will be defined by\r
+ // PcdSevEsWorkAreaBase. The Segment/Rip must be the jump address\r
+ // from the original INIT-SIPI-SIPI.\r
+ //\r
+ if (CpuMpData->SevEsIsEnabled) {\r
+ SetSevEsJumpTable (ExchangeInfo->BufferStart);\r
+ }\r
+\r
+ SendInitSipiSipi (\r
+ CpuInfoInHob[ProcessorNumber].ApicId,\r
+ (UINT32) ExchangeInfo->BufferStart\r
+ );\r
+ }\r
+ //\r
+ // Wait specified AP waken up\r
+ //\r
+ WaitApWakeup (CpuData->StartupApSignal);\r
+ }\r
+\r
+ if (ResetVectorRequired) {\r
+ FreeResetVector (CpuMpData);\r
+ }\r
+\r
+ //\r
+ // After one round of Wakeup Ap actions, need to re-sync ApLoopMode with\r
+ // WakeUpByInitSipiSipi flag. WakeUpByInitSipiSipi flag maybe changed by\r
+ // S3SmmInitDone Ppi.\r
+ //\r
+ CpuMpData->WakeUpByInitSipiSipi = (CpuMpData->ApLoopMode == ApInHltLoop);\r
+}\r
+\r
+/**\r
+ Calculate timeout value and return the current performance counter value.\r
+\r
+ Calculate the number of performance counter ticks required for a timeout.\r
+ If TimeoutInMicroseconds is 0, return value is also 0, which is recognized\r
+ as infinity.\r
+\r
+ @param[in] TimeoutInMicroseconds Timeout value in microseconds.\r
+ @param[out] CurrentTime Returns the current value of the performance counter.\r
+\r
+ @return Expected time stamp counter for timeout.\r
+ If TimeoutInMicroseconds is 0, return value is also 0, which is recognized\r
+ as infinity.\r
+\r
+**/\r
+UINT64\r
+CalculateTimeout (\r
+ IN UINTN TimeoutInMicroseconds,\r
+ OUT UINT64 *CurrentTime\r
+ )\r
+{\r
+ UINT64 TimeoutInSeconds;\r
+ UINT64 TimestampCounterFreq;\r
+\r
+ //\r
+ // Read the current value of the performance counter\r
+ //\r
+ *CurrentTime = GetPerformanceCounter ();\r
+\r
+ //\r
+ // If TimeoutInMicroseconds is 0, return value is also 0, which is recognized\r
+ // as infinity.\r
+ //\r
+ if (TimeoutInMicroseconds == 0) {\r
+ return 0;\r
+ }\r
+\r
+ //\r
+ // GetPerformanceCounterProperties () returns the timestamp counter's frequency\r
+ // in Hz.\r
+ //\r
+ TimestampCounterFreq = GetPerformanceCounterProperties (NULL, NULL);\r
+\r
+ //\r
+ // Check the potential overflow before calculate the number of ticks for the timeout value.\r
+ //\r
+ if (DivU64x64Remainder (MAX_UINT64, TimeoutInMicroseconds, NULL) < TimestampCounterFreq) {\r
+ //\r
+ // Convert microseconds into seconds if direct multiplication overflows\r
+ //\r
+ TimeoutInSeconds = DivU64x32 (TimeoutInMicroseconds, 1000000);\r
+ //\r
+ // Assertion if the final tick count exceeds MAX_UINT64\r
+ //\r
+ ASSERT (DivU64x64Remainder (MAX_UINT64, TimeoutInSeconds, NULL) >= TimestampCounterFreq);\r
+ return MultU64x64 (TimestampCounterFreq, TimeoutInSeconds);\r
+ } else {\r
+ //\r
+ // No overflow case, multiply the return value with TimeoutInMicroseconds and then divide\r
+ // it by 1,000,000, to get the number of ticks for the timeout value.\r
+ //\r
+ return DivU64x32 (\r
+ MultU64x64 (\r
+ TimestampCounterFreq,\r
+ TimeoutInMicroseconds\r
+ ),\r
+ 1000000\r
+ );\r
+ }\r
+}\r
+\r
+/**\r
+ Checks whether timeout expires.\r
+\r
+ Check whether the number of elapsed performance counter ticks required for\r
+ a timeout condition has been reached.\r
+ If Timeout is zero, which means infinity, return value is always FALSE.\r
+\r
+ @param[in, out] PreviousTime On input, the value of the performance counter\r
+ when it was last read.\r
+ On output, the current value of the performance\r
+ counter\r
+ @param[in] TotalTime The total amount of elapsed time in performance\r
+ counter ticks.\r
+ @param[in] Timeout The number of performance counter ticks required\r
+ to reach a timeout condition.\r
+\r
+ @retval TRUE A timeout condition has been reached.\r
+ @retval FALSE A timeout condition has not been reached.\r
+\r
+**/\r
+BOOLEAN\r
+CheckTimeout (\r
+ IN OUT UINT64 *PreviousTime,\r
+ IN UINT64 *TotalTime,\r
+ IN UINT64 Timeout\r
+ )\r
+{\r
+ UINT64 Start;\r
+ UINT64 End;\r
+ UINT64 CurrentTime;\r
+ INT64 Delta;\r
+ INT64 Cycle;\r
+\r
+ if (Timeout == 0) {\r
+ return FALSE;\r
+ }\r
+ GetPerformanceCounterProperties (&Start, &End);\r
+ Cycle = End - Start;\r
+ if (Cycle < 0) {\r
+ Cycle = -Cycle;\r
+ }\r
+ Cycle++;\r
+ CurrentTime = GetPerformanceCounter();\r
+ Delta = (INT64) (CurrentTime - *PreviousTime);\r
+ if (Start > End) {\r
+ Delta = -Delta;\r
+ }\r
+ if (Delta < 0) {\r
+ Delta += Cycle;\r
+ }\r
+ *TotalTime += Delta;\r
+ *PreviousTime = CurrentTime;\r
+ if (*TotalTime > Timeout) {\r
+ return TRUE;\r
+ }\r
+ return FALSE;\r
+}\r
+\r
+/**\r
+ Helper function that waits until the finished AP count reaches the specified\r
+ limit, or the specified timeout elapses (whichever comes first).\r
+\r
+ @param[in] CpuMpData Pointer to CPU MP Data.\r
+ @param[in] FinishedApLimit The number of finished APs to wait for.\r
+ @param[in] TimeLimit The number of microseconds to wait for.\r
+**/\r
+VOID\r
+TimedWaitForApFinish (\r
+ IN CPU_MP_DATA *CpuMpData,\r
+ IN UINT32 FinishedApLimit,\r
+ IN UINT32 TimeLimit\r
+ )\r
+{\r
+ //\r
+ // CalculateTimeout() and CheckTimeout() consider a TimeLimit of 0\r
+ // "infinity", so check for (TimeLimit == 0) explicitly.\r
+ //\r
+ if (TimeLimit == 0) {\r
+ return;\r
+ }\r
+\r
+ CpuMpData->TotalTime = 0;\r
+ CpuMpData->ExpectedTime = CalculateTimeout (\r
+ TimeLimit,\r
+ &CpuMpData->CurrentTime\r
+ );\r
+ while (CpuMpData->FinishedCount < FinishedApLimit &&\r
+ !CheckTimeout (\r
+ &CpuMpData->CurrentTime,\r
+ &CpuMpData->TotalTime,\r
+ CpuMpData->ExpectedTime\r
+ )) {\r
+ CpuPause ();\r
+ }\r
+\r
+ if (CpuMpData->FinishedCount >= FinishedApLimit) {\r
+ DEBUG ((\r
+ DEBUG_VERBOSE,\r
+ "%a: reached FinishedApLimit=%u in %Lu microseconds\n",\r
+ __FUNCTION__,\r
+ FinishedApLimit,\r
+ DivU64x64Remainder (\r
+ MultU64x32 (CpuMpData->TotalTime, 1000000),\r
+ GetPerformanceCounterProperties (NULL, NULL),\r
+ NULL\r
+ )\r
+ ));\r
+ }\r
+}\r
+\r
+/**\r
+ Reset an AP to Idle state.\r
+\r
+ Any task being executed by the AP will be aborted and the AP\r
+ will be waiting for a new task in Wait-For-SIPI state.\r
+\r
+ @param[in] ProcessorNumber The handle number of processor.\r
+**/\r
+VOID\r
+ResetProcessorToIdleState (\r
+ IN UINTN ProcessorNumber\r
+ )\r
+{\r
+ CPU_MP_DATA *CpuMpData;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ CpuMpData->InitFlag = ApInitReconfig;\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, NULL, NULL, TRUE);\r
+ while (CpuMpData->FinishedCount < 1) {\r
+ CpuPause ();\r
+ }\r
+ CpuMpData->InitFlag = ApInitDone;\r
+\r
+ SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);\r
+}\r
+\r
+/**\r
+ Searches for the next waiting AP.\r
+\r
+ Search for the next AP that is put in waiting state by single-threaded StartupAllAPs().\r
+\r
+ @param[out] NextProcessorNumber Pointer to the processor number of the next waiting AP.\r
+\r
+ @retval EFI_SUCCESS The next waiting AP has been found.\r
+ @retval EFI_NOT_FOUND No waiting AP exists.\r
+\r
+**/\r
+EFI_STATUS\r
+GetNextWaitingProcessorNumber (\r
+ OUT UINTN *NextProcessorNumber\r
+ )\r
+{\r
+ UINTN ProcessorNumber;\r
+ CPU_MP_DATA *CpuMpData;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {\r
+ if (CpuMpData->CpuData[ProcessorNumber].Waiting) {\r
+ *NextProcessorNumber = ProcessorNumber;\r
+ return EFI_SUCCESS;\r
+ }\r
+ }\r
+\r
+ return EFI_NOT_FOUND;\r
+}\r
+\r
+/** Checks status of specified AP.\r
+\r
+ This function checks whether the specified AP has finished the task assigned\r
+ by StartupThisAP(), and whether timeout expires.\r
+\r
+ @param[in] ProcessorNumber The handle number of processor.\r
+\r
+ @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
+ @retval EFI_TIMEOUT The timeout expires.\r
+ @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
+**/\r
+EFI_STATUS\r
+CheckThisAP (\r
+ IN UINTN ProcessorNumber\r
+ )\r
+{\r
+ CPU_MP_DATA *CpuMpData;\r
+ CPU_AP_DATA *CpuData;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+\r
+ //\r
+ // Check the CPU state of AP. If it is CpuStateIdle, then the AP has finished its task.\r
+ // Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the\r
+ // value of state after setting the it to CpuStateIdle, so BSP can safely make use of its value.\r
+ //\r
+ //\r
+ // If the AP finishes for StartupThisAP(), return EFI_SUCCESS.\r
+ //\r
+ if (GetApState(CpuData) == CpuStateFinished) {\r
+ if (CpuData->Finished != NULL) {\r
+ *(CpuData->Finished) = TRUE;\r
+ }\r
+ SetApState (CpuData, CpuStateIdle);\r
+ return EFI_SUCCESS;\r
+ } else {\r
+ //\r
+ // If timeout expires for StartupThisAP(), report timeout.\r
+ //\r
+ if (CheckTimeout (&CpuData->CurrentTime, &CpuData->TotalTime, CpuData->ExpectedTime)) {\r
+ if (CpuData->Finished != NULL) {\r
+ *(CpuData->Finished) = FALSE;\r
+ }\r
+ //\r
+ // Reset failed AP to idle state\r
+ //\r
+ ResetProcessorToIdleState (ProcessorNumber);\r
+\r
+ return EFI_TIMEOUT;\r
+ }\r
+ }\r
+ return EFI_NOT_READY;\r
+}\r
+\r
+/**\r
+ Checks status of all APs.\r
+\r
+ This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
+ and whether timeout expires.\r
+\r
+ @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
+ @retval EFI_TIMEOUT The timeout expires.\r
+ @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
+**/\r
+EFI_STATUS\r
+CheckAllAPs (\r
+ VOID\r
+ )\r
+{\r
+ UINTN ProcessorNumber;\r
+ UINTN NextProcessorNumber;\r
+ UINTN ListIndex;\r
+ EFI_STATUS Status;\r
+ CPU_MP_DATA *CpuMpData;\r
+ CPU_AP_DATA *CpuData;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ NextProcessorNumber = 0;\r
+\r
+ //\r
+ // Go through all APs that are responsible for the StartupAllAPs().\r
+ //\r
+ for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {\r
+ if (!CpuMpData->CpuData[ProcessorNumber].Waiting) {\r
+ continue;\r
+ }\r
+\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ //\r
+ // Check the CPU state of AP. If it is CpuStateIdle, then the AP has finished its task.\r
+ // Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the\r
+ // value of state after setting the it to CpuStateIdle, so BSP can safely make use of its value.\r
+ //\r
+ if (GetApState(CpuData) == CpuStateFinished) {\r
+ CpuMpData->RunningCount --;\r
+ CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;\r
+ SetApState(CpuData, CpuStateIdle);\r
+\r
//\r
- // Wakeup all APs\r
+ // If in Single Thread mode, then search for the next waiting AP for execution.\r
//\r
- SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ if (CpuMpData->SingleThread) {\r
+ Status = GetNextWaitingProcessorNumber (&NextProcessorNumber);\r
+\r
+ if (!EFI_ERROR (Status)) {\r
+ WakeUpAP (\r
+ CpuMpData,\r
+ FALSE,\r
+ (UINT32) NextProcessorNumber,\r
+ CpuMpData->Procedure,\r
+ CpuMpData->ProcArguments,\r
+ TRUE\r
+ );\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ // If all APs finish, return EFI_SUCCESS.\r
+ //\r
+ if (CpuMpData->RunningCount == 0) {\r
+ return EFI_SUCCESS;\r
+ }\r
+\r
+ //\r
+ // If timeout expires, report timeout.\r
+ //\r
+ if (CheckTimeout (\r
+ &CpuMpData->CurrentTime,\r
+ &CpuMpData->TotalTime,\r
+ CpuMpData->ExpectedTime)\r
+ ) {\r
+ //\r
+ // If FailedCpuList is not NULL, record all failed APs in it.\r
+ //\r
+ if (CpuMpData->FailedCpuList != NULL) {\r
+ *CpuMpData->FailedCpuList =\r
+ AllocatePool ((CpuMpData->RunningCount + 1) * sizeof (UINTN));\r
+ ASSERT (*CpuMpData->FailedCpuList != NULL);\r
}\r
- if (CpuMpData->InitFlag != ApInitConfig) {\r
+ ListIndex = 0;\r
+\r
+ for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {\r
//\r
- // Wait all APs waken up if this is not the 1st broadcast of SIPI\r
+ // Check whether this processor is responsible for StartupAllAPs().\r
//\r
- for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
- CpuData = &CpuMpData->CpuData[Index];\r
- if (Index != CpuMpData->BspNumber) {\r
- WaitApWakeup (CpuData->StartupApSignal);\r
+ if (CpuMpData->CpuData[ProcessorNumber].Waiting) {\r
+ //\r
+ // Reset failed APs to idle state\r
+ //\r
+ ResetProcessorToIdleState (ProcessorNumber);\r
+ CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;\r
+ if (CpuMpData->FailedCpuList != NULL) {\r
+ (*CpuMpData->FailedCpuList)[ListIndex++] = ProcessorNumber;\r
}\r
}\r
}\r
- } else {\r
- CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
- CpuData->ApFunction = (UINTN) Procedure;\r
- CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
- SetApState (CpuData, CpuStateReady);\r
- //\r
- // Wakeup specified AP\r
- //\r
- ASSERT (CpuMpData->InitFlag != ApInitConfig);\r
- *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;\r
- if (ResetVectorRequired) {\r
- SendInitSipiSipi (\r
- CpuData->ApicId,\r
- (UINT32) ExchangeInfo->BufferStart\r
- );\r
+ if (CpuMpData->FailedCpuList != NULL) {\r
+ (*CpuMpData->FailedCpuList)[ListIndex] = END_OF_CPU_LIST;\r
}\r
- //\r
- // Wait specified AP waken up\r
- //\r
- WaitApWakeup (CpuData->StartupApSignal);\r
- }\r
-\r
- if (ResetVectorRequired) {\r
- FreeResetVector (CpuMpData);\r
+ return EFI_TIMEOUT;\r
}\r
+ return EFI_NOT_READY;\r
}\r
\r
/**\r
UINT32 MaxLogicalProcessorNumber;\r
UINT32 ApStackSize;\r
MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
+ CPU_VOLATILE_REGISTERS VolatileRegisters;\r
UINTN BufferSize;\r
UINT32 MonitorFilterSize;\r
VOID *MpBuffer;\r
UINTN Index;\r
UINTN ApResetVectorSize;\r
UINTN BackupBufferAddr;\r
+ UINTN ApIdtBase;\r
\r
OldCpuMpData = GetCpuMpDataFromGuidedHob ();\r
if (OldCpuMpData == NULL) {\r
} else {\r
MaxLogicalProcessorNumber = OldCpuMpData->CpuCount;\r
}\r
+ ASSERT (MaxLogicalProcessorNumber != 0);\r
\r
AsmGetAddressMap (&AddressMap);\r
- ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r
+ ApResetVectorSize = GetApResetVectorSize (&AddressMap);\r
ApStackSize = PcdGet32(PcdCpuApStackSize);\r
ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r
\r
+ //\r
+ // Save BSP's Control registers for APs.\r
+ //\r
+ SaveVolatileRegisters (&VolatileRegisters);\r
+\r
BufferSize = ApStackSize * MaxLogicalProcessorNumber;\r
BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;\r
- BufferSize += sizeof (CPU_MP_DATA);\r
BufferSize += ApResetVectorSize;\r
+ BufferSize = ALIGN_VALUE (BufferSize, 8);\r
+ BufferSize += VolatileRegisters.Idtr.Limit + 1;\r
+ BufferSize += sizeof (CPU_MP_DATA);\r
BufferSize += (sizeof (CPU_AP_DATA) + sizeof (CPU_INFO_IN_HOB))* MaxLogicalProcessorNumber;\r
MpBuffer = AllocatePages (EFI_SIZE_TO_PAGES (BufferSize));\r
ASSERT (MpBuffer != NULL);\r
ZeroMem (MpBuffer, BufferSize);\r
Buffer = (UINTN) MpBuffer;\r
\r
+ //\r
+ // The layout of the Buffer is as below:\r
+ //\r
+ // +--------------------+ <-- Buffer\r
+ // AP Stacks (N)\r
+ // +--------------------+ <-- MonitorBuffer\r
+ // AP Monitor Filters (N)\r
+ // +--------------------+ <-- BackupBufferAddr (CpuMpData->BackupBuffer)\r
+ // Backup Buffer\r
+ // +--------------------+\r
+ // Padding\r
+ // +--------------------+ <-- ApIdtBase (8-byte boundary)\r
+ // AP IDT All APs share one separate IDT. So AP can get address of CPU_MP_DATA from IDT Base.\r
+ // +--------------------+ <-- CpuMpData\r
+ // CPU_MP_DATA\r
+ // +--------------------+ <-- CpuMpData->CpuData\r
+ // CPU_AP_DATA (N)\r
+ // +--------------------+ <-- CpuMpData->CpuInfoInHob\r
+ // CPU_INFO_IN_HOB (N)\r
+ // +--------------------+\r
+ //\r
MonitorBuffer = (UINT8 *) (Buffer + ApStackSize * MaxLogicalProcessorNumber);\r
BackupBufferAddr = (UINTN) MonitorBuffer + MonitorFilterSize * MaxLogicalProcessorNumber;\r
- CpuMpData = (CPU_MP_DATA *) (BackupBufferAddr + ApResetVectorSize);\r
+ ApIdtBase = ALIGN_VALUE (BackupBufferAddr + ApResetVectorSize, 8);\r
+ CpuMpData = (CPU_MP_DATA *) (ApIdtBase + VolatileRegisters.Idtr.Limit + 1);\r
CpuMpData->Buffer = Buffer;\r
CpuMpData->CpuApStackSize = ApStackSize;\r
CpuMpData->BackupBuffer = BackupBufferAddr;\r
CpuMpData->BackupBufferSize = ApResetVectorSize;\r
- CpuMpData->EndOfPeiFlag = FALSE;\r
CpuMpData->WakeupBuffer = (UINTN) -1;\r
CpuMpData->CpuCount = 1;\r
CpuMpData->BspNumber = 0;\r
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);\r
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);\r
InitializeSpinLock(&CpuMpData->MpLock);\r
+ CpuMpData->SevEsIsEnabled = PcdGetBool (PcdSevEsIsEnabled);\r
+ CpuMpData->SevEsAPBuffer = (UINTN) -1;\r
+ CpuMpData->GhcbBase = PcdGet64 (PcdGhcbBase);\r
+\r
+ //\r
+ // Make sure no memory usage outside of the allocated buffer.\r
//\r
- // Save BSP's Control registers to APs\r
+ ASSERT ((CpuMpData->CpuInfoInHob + sizeof (CPU_INFO_IN_HOB) * MaxLogicalProcessorNumber) ==\r
+ Buffer + BufferSize);\r
+\r
+ //\r
+ // Duplicate BSP's IDT to APs.\r
+ // All APs share one separate IDT. So AP can get the address of CpuMpData by using IDTR.BASE + IDTR.LIMIT + 1\r
+ //\r
+ CopyMem ((VOID *)ApIdtBase, (VOID *)VolatileRegisters.Idtr.Base, VolatileRegisters.Idtr.Limit + 1);\r
+ VolatileRegisters.Idtr.Base = ApIdtBase;\r
+ //\r
+ // Don't pass BSP's TR to APs to avoid AP init failure.\r
//\r
- SaveVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters);\r
+ VolatileRegisters.Tr = 0;\r
+ CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));\r
//\r
// Set BSP basic information\r
//\r
- InitializeApData (CpuMpData, 0, 0);\r
+ InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSize);\r
//\r
// Save assembly code information\r
//\r
//\r
CpuMpData->ApLoopMode = ApLoopMode;\r
DEBUG ((DEBUG_INFO, "AP Loop Mode is %d\n", CpuMpData->ApLoopMode));\r
+\r
+ CpuMpData->WakeUpByInitSipiSipi = (CpuMpData->ApLoopMode == ApInHltLoop);\r
+\r
//\r
// Set up APs wakeup signal buffer\r
//\r
(UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);\r
}\r
//\r
- // Load Microcode on BSP\r
- //\r
- MicrocodeDetect (CpuMpData);\r
- //\r
- // Store BSP's MTRR setting\r
+ // Enable the local APIC for Virtual Wire Mode.\r
//\r
- MtrrGetAllMtrrs (&CpuMpData->MtrrTable);\r
+ ProgramVirtualWireMode ();\r
\r
if (OldCpuMpData == NULL) {\r
- //\r
- // Wakeup all APs and calculate the processor count in system\r
- //\r
- CollectProcessorCount (CpuMpData);\r
+ if (MaxLogicalProcessorNumber > 1) {\r
+ //\r
+ // Wakeup all APs and calculate the processor count in system\r
+ //\r
+ CollectProcessorCount (CpuMpData);\r
+ }\r
} else {\r
//\r
// APs have been wakeup before, just get the CPU Information\r
// from HOB\r
//\r
+ OldCpuMpData->NewCpuMpData = CpuMpData;\r
CpuMpData->CpuCount = OldCpuMpData->CpuCount;\r
CpuMpData->BspNumber = OldCpuMpData->BspNumber;\r
- CpuMpData->InitFlag = ApInitReconfig;\r
- CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) OldCpuMpData->CpuInfoInHob;\r
+ CpuMpData->CpuInfoInHob = OldCpuMpData->CpuInfoInHob;\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
InitializeSpinLock(&CpuMpData->CpuData[Index].ApLock);\r
- CpuMpData->CpuData[Index].ApicId = CpuInfoInHob[Index].ApicId;\r
- CpuMpData->CpuData[Index].InitialApicId = CpuInfoInHob[Index].InitialApicId;\r
- if (CpuMpData->CpuData[Index].InitialApicId >= 255) {\r
- CpuMpData->X2ApicEnable = TRUE;\r
- }\r
- CpuMpData->CpuData[Index].Health = CpuInfoInHob[Index].Health;\r
- CpuMpData->CpuData[Index].CpuHealthy = (CpuMpData->CpuData[Index].Health == 0)? TRUE:FALSE;\r
+ CpuMpData->CpuData[Index].CpuHealthy = (CpuInfoInHob[Index].Health == 0)? TRUE:FALSE;\r
CpuMpData->CpuData[Index].ApFunction = 0;\r
- CopyMem (\r
- &CpuMpData->CpuData[Index].VolatileRegisters,\r
- &CpuMpData->CpuData[0].VolatileRegisters,\r
- sizeof (CPU_VOLATILE_REGISTERS)\r
- );\r
}\r
+ }\r
+\r
+ if (!GetMicrocodePatchInfoFromHob (\r
+ &CpuMpData->MicrocodePatchAddress,\r
+ &CpuMpData->MicrocodePatchRegionSize\r
+ )) {\r
//\r
- // Wakeup APs to do some AP initialize sync\r
+ // The microcode patch information cache HOB does not exist, which means\r
+ // the microcode patches data has not been loaded into memory yet\r
//\r
- WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData);\r
+ ShadowMicrocodeUpdatePatch (CpuMpData);\r
+ }\r
+\r
+ //\r
+ // Detect and apply Microcode on BSP\r
+ //\r
+ MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);\r
+ //\r
+ // Store BSP's MTRR setting\r
+ //\r
+ MtrrGetAllMtrrs (&CpuMpData->MtrrTable);\r
+\r
+ //\r
+ // Wakeup APs to do some AP initialize sync (Microcode & MTRR)\r
+ //\r
+ if (CpuMpData->CpuCount > 1) {\r
+ if (OldCpuMpData != NULL) {\r
+ //\r
+ // Only needs to use this flag for DXE phase to update the wake up\r
+ // buffer. Wakeup buffer allocated in PEI phase is no longer valid\r
+ // in DXE.\r
+ //\r
+ CpuMpData->InitFlag = ApInitReconfig;\r
+ }\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);\r
//\r
// Wait for all APs finished initialization\r
//\r
while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {\r
CpuPause ();\r
}\r
- CpuMpData->InitFlag = ApInitDone;\r
+ if (OldCpuMpData != NULL) {\r
+ CpuMpData->InitFlag = ApInitDone;\r
+ }\r
for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);\r
}\r
{\r
CPU_MP_DATA *CpuMpData;\r
UINTN CallerNumber;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ UINTN OriginalProcessorNumber;\r
\r
CpuMpData = GetCpuMpData ();\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
+\r
+ //\r
+ // Lower 24 bits contains the actual processor number.\r
+ //\r
+ OriginalProcessorNumber = ProcessorNumber;\r
+ ProcessorNumber &= BIT24 - 1;\r
\r
//\r
// Check whether caller processor is BSP\r
return EFI_NOT_FOUND;\r
}\r
\r
- ProcessorInfoBuffer->ProcessorId = (UINT64) CpuMpData->CpuData[ProcessorNumber].ApicId;\r
+ ProcessorInfoBuffer->ProcessorId = (UINT64) CpuInfoInHob[ProcessorNumber].ApicId;\r
ProcessorInfoBuffer->StatusFlag = 0;\r
if (ProcessorNumber == CpuMpData->BspNumber) {\r
ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;\r
//\r
// Get processor location information\r
//\r
- ExtractProcessorLocation (CpuMpData->CpuData[ProcessorNumber].ApicId, &ProcessorInfoBuffer->Location);\r
+ GetProcessorLocationByApicId (\r
+ CpuInfoInHob[ProcessorNumber].ApicId,\r
+ &ProcessorInfoBuffer->Location.Package,\r
+ &ProcessorInfoBuffer->Location.Core,\r
+ &ProcessorInfoBuffer->Location.Thread\r
+ );\r
+\r
+ if ((OriginalProcessorNumber & CPU_V2_EXTENDED_TOPOLOGY) != 0) {\r
+ GetProcessorLocation2ByApicId (\r
+ CpuInfoInHob[ProcessorNumber].ApicId,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Package,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Die,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Tile,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Module,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Core,\r
+ &ProcessorInfoBuffer->ExtendedInformation.Location2.Thread\r
+ );\r
+ }\r
\r
if (HealthData != NULL) {\r
- HealthData->Uint32 = CpuMpData->CpuData[ProcessorNumber].Health;\r
+ HealthData->Uint32 = CpuInfoInHob[ProcessorNumber].Health;\r
}\r
\r
return EFI_SUCCESS;\r
enabled AP. Otherwise, it will be disabled.\r
\r
@retval EFI_SUCCESS BSP successfully switched.\r
- @retval others Failed to switch BSP. \r
+ @retval others Failed to switch BSP.\r
\r
**/\r
EFI_STATUS\r
UINTN CallerNumber;\r
CPU_STATE State;\r
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;\r
+ BOOLEAN OldInterruptState;\r
+ BOOLEAN OldTimerInterruptState;\r
+\r
+ //\r
+ // Save and Disable Local APIC timer interrupt\r
+ //\r
+ OldTimerInterruptState = GetApicTimerInterruptState ();\r
+ DisableApicTimerInterrupt ();\r
+ //\r
+ // Before send both BSP and AP to a procedure to exchange their roles,\r
+ // interrupt must be disabled. This is because during the exchange role\r
+ // process, 2 CPU may use 1 stack. If interrupt happens, the stack will\r
+ // be corrupted, since interrupt return address will be pushed to stack\r
+ // by hardware.\r
+ //\r
+ OldInterruptState = SaveAndDisableInterrupts ();\r
+\r
+ //\r
+ // Mask LINT0 & LINT1 for the old BSP\r
+ //\r
+ DisableLvtInterrupts ();\r
\r
CpuMpData = GetCpuMpData ();\r
\r
//\r
MpInitLibWhoAmI (&CallerNumber);\r
if (CallerNumber != CpuMpData->BspNumber) {\r
- return EFI_SUCCESS;\r
+ return EFI_DEVICE_ERROR;\r
}\r
\r
if (ProcessorNumber >= CpuMpData->CpuCount) {\r
CpuMpData->BSPInfo.State = CPU_SWITCH_STATE_IDLE;\r
CpuMpData->APInfo.State = CPU_SWITCH_STATE_IDLE;\r
CpuMpData->SwitchBspFlag = TRUE;\r
+ CpuMpData->NewBspNumber = ProcessorNumber;\r
\r
//\r
// Clear the BSP bit of MSR_IA32_APIC_BASE\r
//\r
// Need to wakeUp AP (future BSP).\r
//\r
- WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData);\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData, TRUE);\r
\r
AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);\r
\r
ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
ApicBaseMsr.Bits.BSP = 1;\r
AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);\r
+ ProgramVirtualWireMode ();\r
\r
//\r
// Wait for old BSP finished AP task\r
//\r
if (!EnableOldBSP) {\r
SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateDisabled);\r
+ } else {\r
+ SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateIdle);\r
}\r
//\r
// Save new BSP number\r
//\r
CpuMpData->BspNumber = (UINT32) ProcessorNumber;\r
\r
+ //\r
+ // Restore interrupt state.\r
+ //\r
+ SetInterruptState (OldInterruptState);\r
+\r
+ if (OldTimerInterruptState) {\r
+ EnableApicTimerInterrupt ();\r
+ }\r
+\r
return EFI_SUCCESS;\r
}\r
\r
if (!EnableAP) {\r
SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateDisabled);\r
} else {\r
- SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);\r
+ ResetProcessorToIdleState (ProcessorNumber);\r
}\r
\r
if (HealthFlag != NULL) {\r
}\r
\r
\r
+/**\r
+ Worker function to execute a caller provided function on all enabled APs.\r
+\r
+ @param[in] Procedure A pointer to the function to be run on\r
+ enabled APs of the system.\r
+ @param[in] SingleThread If TRUE, then all the enabled APs execute\r
+ the function specified by Procedure one by\r
+ one, in ascending order of processor handle\r
+ number. If FALSE, then all the enabled APs\r
+ execute the function specified by Procedure\r
+ simultaneously.\r
+ @param[in] ExcludeBsp Whether let BSP also trig this task.\r
+ @param[in] WaitEvent The event created by the caller with CreateEvent()\r
+ service.\r
+ @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
+ APs to return from Procedure, either for\r
+ blocking or non-blocking mode.\r
+ @param[in] ProcedureArgument The parameter passed into Procedure for\r
+ all APs.\r
+ @param[out] FailedCpuList If all APs finish successfully, then its\r
+ content is set to NULL. If not all APs\r
+ finish before timeout expires, then its\r
+ content is set to address of the buffer\r
+ holding handle numbers of the failed APs.\r
+\r
+ @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
+ the timeout expired.\r
+ @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
+ to all enabled APs.\r
+ @retval others Failed to Startup all APs.\r
+\r
+**/\r
+EFI_STATUS\r
+StartupAllCPUsWorker (\r
+ IN EFI_AP_PROCEDURE Procedure,\r
+ IN BOOLEAN SingleThread,\r
+ IN BOOLEAN ExcludeBsp,\r
+ IN EFI_EVENT WaitEvent OPTIONAL,\r
+ IN UINTN TimeoutInMicroseconds,\r
+ IN VOID *ProcedureArgument OPTIONAL,\r
+ OUT UINTN **FailedCpuList OPTIONAL\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ CPU_MP_DATA *CpuMpData;\r
+ UINTN ProcessorCount;\r
+ UINTN ProcessorNumber;\r
+ UINTN CallerNumber;\r
+ CPU_AP_DATA *CpuData;\r
+ BOOLEAN HasEnabledAp;\r
+ CPU_STATE ApState;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ if (FailedCpuList != NULL) {\r
+ *FailedCpuList = NULL;\r
+ }\r
+\r
+ if (CpuMpData->CpuCount == 1 && ExcludeBsp) {\r
+ return EFI_NOT_STARTED;\r
+ }\r
+\r
+ if (Procedure == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Check whether caller processor is BSP\r
+ //\r
+ MpInitLibWhoAmI (&CallerNumber);\r
+ if (CallerNumber != CpuMpData->BspNumber) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ //\r
+ // Update AP state\r
+ //\r
+ CheckAndUpdateApsStatus ();\r
+\r
+ ProcessorCount = CpuMpData->CpuCount;\r
+ HasEnabledAp = FALSE;\r
+ //\r
+ // Check whether all enabled APs are idle.\r
+ // If any enabled AP is not idle, return EFI_NOT_READY.\r
+ //\r
+ for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ if (ProcessorNumber != CpuMpData->BspNumber) {\r
+ ApState = GetApState (CpuData);\r
+ if (ApState != CpuStateDisabled) {\r
+ HasEnabledAp = TRUE;\r
+ if (ApState != CpuStateIdle) {\r
+ //\r
+ // If any enabled APs are busy, return EFI_NOT_READY.\r
+ //\r
+ return EFI_NOT_READY;\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ if (!HasEnabledAp && ExcludeBsp) {\r
+ //\r
+ // If no enabled AP exists and not include Bsp to do the procedure, return EFI_NOT_STARTED.\r
+ //\r
+ return EFI_NOT_STARTED;\r
+ }\r
+\r
+ CpuMpData->RunningCount = 0;\r
+ for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ CpuData->Waiting = FALSE;\r
+ if (ProcessorNumber != CpuMpData->BspNumber) {\r
+ if (CpuData->State == CpuStateIdle) {\r
+ //\r
+ // Mark this processor as responsible for current calling.\r
+ //\r
+ CpuData->Waiting = TRUE;\r
+ CpuMpData->RunningCount++;\r
+ }\r
+ }\r
+ }\r
+\r
+ CpuMpData->Procedure = Procedure;\r
+ CpuMpData->ProcArguments = ProcedureArgument;\r
+ CpuMpData->SingleThread = SingleThread;\r
+ CpuMpData->FinishedCount = 0;\r
+ CpuMpData->FailedCpuList = FailedCpuList;\r
+ CpuMpData->ExpectedTime = CalculateTimeout (\r
+ TimeoutInMicroseconds,\r
+ &CpuMpData->CurrentTime\r
+ );\r
+ CpuMpData->TotalTime = 0;\r
+ CpuMpData->WaitEvent = WaitEvent;\r
+\r
+ if (!SingleThread) {\r
+ WakeUpAP (CpuMpData, TRUE, 0, Procedure, ProcedureArgument, FALSE);\r
+ } else {\r
+ for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {\r
+ if (ProcessorNumber == CallerNumber) {\r
+ continue;\r
+ }\r
+ if (CpuMpData->CpuData[ProcessorNumber].Waiting) {\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument, TRUE);\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+ if (!ExcludeBsp) {\r
+ //\r
+ // Start BSP.\r
+ //\r
+ Procedure (ProcedureArgument);\r
+ }\r
+\r
+ Status = EFI_SUCCESS;\r
+ if (WaitEvent == NULL) {\r
+ do {\r
+ Status = CheckAllAPs ();\r
+ } while (Status == EFI_NOT_READY);\r
+ }\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Worker function to let the caller get one enabled AP to execute a caller-provided\r
+ function.\r
+\r
+ @param[in] Procedure A pointer to the function to be run on\r
+ enabled APs of the system.\r
+ @param[in] ProcessorNumber The handle number of the AP.\r
+ @param[in] WaitEvent The event created by the caller with CreateEvent()\r
+ service.\r
+ @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
+ APs to return from Procedure, either for\r
+ blocking or non-blocking mode.\r
+ @param[in] ProcedureArgument The parameter passed into Procedure for\r
+ all APs.\r
+ @param[out] Finished If AP returns from Procedure before the\r
+ timeout expires, its content is set to TRUE.\r
+ Otherwise, the value is set to FALSE.\r
+\r
+ @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
+ the timeout expires.\r
+ @retval others Failed to Startup AP.\r
+\r
+**/\r
+EFI_STATUS\r
+StartupThisAPWorker (\r
+ IN EFI_AP_PROCEDURE Procedure,\r
+ IN UINTN ProcessorNumber,\r
+ IN EFI_EVENT WaitEvent OPTIONAL,\r
+ IN UINTN TimeoutInMicroseconds,\r
+ IN VOID *ProcedureArgument OPTIONAL,\r
+ OUT BOOLEAN *Finished OPTIONAL\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ CPU_MP_DATA *CpuMpData;\r
+ CPU_AP_DATA *CpuData;\r
+ UINTN CallerNumber;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ if (Finished != NULL) {\r
+ *Finished = FALSE;\r
+ }\r
+\r
+ //\r
+ // Check whether caller processor is BSP\r
+ //\r
+ MpInitLibWhoAmI (&CallerNumber);\r
+ if (CallerNumber != CpuMpData->BspNumber) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ //\r
+ // Check whether processor with the handle specified by ProcessorNumber exists\r
+ //\r
+ if (ProcessorNumber >= CpuMpData->CpuCount) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ //\r
+ // Check whether specified processor is BSP\r
+ //\r
+ if (ProcessorNumber == CpuMpData->BspNumber) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Check parameter Procedure\r
+ //\r
+ if (Procedure == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Update AP state\r
+ //\r
+ CheckAndUpdateApsStatus ();\r
+\r
+ //\r
+ // Check whether specified AP is disabled\r
+ //\r
+ if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // If WaitEvent is not NULL, execute in non-blocking mode.\r
+ // BSP saves data for CheckAPsStatus(), and returns EFI_SUCCESS.\r
+ // CheckAPsStatus() will check completion and timeout periodically.\r
+ //\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ CpuData->WaitEvent = WaitEvent;\r
+ CpuData->Finished = Finished;\r
+ CpuData->ExpectedTime = CalculateTimeout (TimeoutInMicroseconds, &CpuData->CurrentTime);\r
+ CpuData->TotalTime = 0;\r
+\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument, TRUE);\r
+\r
+ //\r
+ // If WaitEvent is NULL, execute in blocking mode.\r
+ // BSP checks AP's state until it finishes or TimeoutInMicrosecsond expires.\r
+ //\r
+ Status = EFI_SUCCESS;\r
+ if (WaitEvent == NULL) {\r
+ do {\r
+ Status = CheckThisAP (ProcessorNumber);\r
+ } while (Status == EFI_NOT_READY);\r
+ }\r
+\r
+ return Status;\r
+}\r
+\r
/**\r
Get pointer to CPU MP Data structure from GUIDed HOB.\r
\r
}\r
return CpuMpData;\r
}\r
+\r
+/**\r
+ This service executes a caller provided function on all enabled CPUs.\r
+\r
+ @param[in] Procedure A pointer to the function to be run on\r
+ enabled APs of the system. See type\r
+ EFI_AP_PROCEDURE.\r
+ @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
+ APs to return from Procedure, either for\r
+ blocking or non-blocking mode. Zero means\r
+ infinity. TimeoutInMicroseconds is ignored\r
+ for BSP.\r
+ @param[in] ProcedureArgument The parameter passed into Procedure for\r
+ all APs.\r
+\r
+ @retval EFI_SUCCESS In blocking mode, all CPUs have finished before\r
+ the timeout expired.\r
+ @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
+ to all enabled CPUs.\r
+ @retval EFI_DEVICE_ERROR Caller processor is AP.\r
+ @retval EFI_NOT_READY Any enabled APs are busy.\r
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.\r
+ @retval EFI_TIMEOUT In blocking mode, the timeout expired before\r
+ all enabled APs have finished.\r
+ @retval EFI_INVALID_PARAMETER Procedure is NULL.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+MpInitLibStartupAllCPUs (\r
+ IN EFI_AP_PROCEDURE Procedure,\r
+ IN UINTN TimeoutInMicroseconds,\r
+ IN VOID *ProcedureArgument OPTIONAL\r
+ )\r
+{\r
+ return StartupAllCPUsWorker (\r
+ Procedure,\r
+ FALSE,\r
+ FALSE,\r
+ NULL,\r
+ TimeoutInMicroseconds,\r
+ ProcedureArgument,\r
+ NULL\r
+ );\r
+}\r