UefiCpuPkg CpuMpPei: Update return status to follow spec.

[mirror_edk2.git] / UefiCpuPkg / Library / SmmCpuFeaturesLib / SmmCpuFeaturesLib.c

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
index 1754f2df5f5789fd41be6f6f98fdffe7b895f1cd..2d2bc6ddba9984e427c72b7553dc105a17774e6f 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
@@ -41,6 +41,16 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define SMM_FEATURES_LIB_IA32_MCA_CAP              0x17D\r
 #define   SMM_CODE_ACCESS_CHK_BIT                  BIT58\r
 \r
+/**\r
+  Internal worker function that is called to complete CPU initialization at the\r
+  end of SmmCpuFeaturesInitializeProcessor().\r
+\r
+**/\r
+VOID\r
+FinishSmmCpuFeaturesInitializeProcessor (\r
+  VOID\r
+  );\r
+\r
 //\r
 // Set default value to assume SMRR is not supported\r
 //\r
@@ -257,7 +267,7 @@ SmmCpuFeaturesInitializeProcessor (
       // Print message and halt if CPU is Monarch\r
       //\r
       if (IsMonarch) {\r
-        DEBUG ((EFI_D_ERROR, "SMM Base/Size does not meet alignment/size requirement!\n"));\r
+        DEBUG ((DEBUG_ERROR, "SMM Base/Size does not meet alignment/size requirement!\n"));\r
         CpuDeadLoop ();\r
       }\r
     } else {\r
@@ -286,7 +296,9 @@ SmmCpuFeaturesInitializeProcessor (
   // Intel(R) Core(TM) Processor Family MSRs.\r
   //\r
   if (FamilyId == 0x06) {\r
-    if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46) {\r
+    if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 ||\r
+        ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || ModelId == 0x4F ||\r
+        ModelId == 0x3F || ModelId == 0x56 || ModelId == 0x57 || ModelId == 0x5C) {\r
       //\r
       // Check to see if the CPU supports the SMM Code Access Check feature\r
       // Do not access this MSR unless the CPU supports the SmmRegFeatureControl\r
@@ -296,6 +308,11 @@ SmmCpuFeaturesInitializeProcessor (
       }\r
     }\r
   }\r
+\r
+  //\r
+  //  Call internal worker function that completes the CPU initialization\r
+  //\r
+  FinishSmmCpuFeaturesInitializeProcessor ();\r
 }\r
 \r
 /**\r
@@ -356,66 +373,6 @@ SmmCpuFeaturesSmmRelocationComplete (
 {\r
 }\r
 \r
-/**\r
-  Return the size, in bytes, of a custom SMI Handler in bytes.  If 0 is\r
-  returned, then a custom SMI handler is not provided by this library,\r
-  and the default SMI handler must be used.\r
-\r
-  @retval 0    Use the default SMI handler.\r
-  @retval > 0  Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()\r
-               The caller is required to allocate enough SMRAM for each CPU to\r
-               support the size of the custom SMI handler.\r
-**/\r
-UINTN\r
-EFIAPI\r
-SmmCpuFeaturesGetSmiHandlerSize (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-/**\r
-  Install a custom SMI handler for the CPU specified by CpuIndex.  This function\r
-  is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater\r
-  than zero and is called by the CPU that was elected as monarch during System\r
-  Management Mode initialization.\r
-\r
-  @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.\r
-                        The value must be between 0 and the NumberOfCpus field\r
-                        in the System Management System Table (SMST).\r
-  @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.\r
-  @param[in] SmiStack   The stack to use when an SMI is processed by the\r
-                        the CPU specified by CpuIndex.\r
-  @param[in] StackSize  The size, in bytes, if the stack used when an SMI is\r
-                        processed by the CPU specified by CpuIndex.\r
-  @param[in] GdtBase    The base address of the GDT to use when an SMI is\r
-                        processed by the CPU specified by CpuIndex.\r
-  @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is\r
-                        processed by the CPU specified by CpuIndex.\r
-  @param[in] IdtBase    The base address of the IDT to use when an SMI is\r
-                        processed by the CPU specified by CpuIndex.\r
-  @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is\r
-                        processed by the CPU specified by CpuIndex.\r
-  @param[in] Cr3        The base address of the page tables to use when an SMI\r
-                        is processed by the CPU specified by CpuIndex.\r
-**/\r
-VOID\r
-EFIAPI\r
-SmmCpuFeaturesInstallSmiHandler (\r
-  IN UINTN   CpuIndex,\r
-  IN UINT32  SmBase,\r
-  IN VOID    *SmiStack,\r
-  IN UINTN   StackSize,\r
-  IN UINTN   GdtBase,\r
-  IN UINTN   GdtSize,\r
-  IN UINTN   IdtBase,\r
-  IN UINTN   IdtSize,\r
-  IN UINT32  Cr3\r
-  )\r
-{\r
-}\r
-\r
 /**\r
   Determines if MTRR registers must be configured to set SMRAM cache-ability\r
   when executing in System Management Mode.\r