UefiCpuPkg: Change use of EFI_D_* to DEBUG_*

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / CpuS3.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 2496abb3923ff9e2655cc30c80b7591682b86f0e..0d723336e4d68cf7e657037176fbc0af109a8f20 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -751,7 +751,7 @@ SmmRestoreCpu (
   IA32_IDT_GATE_DESCRIPTOR      IdtEntryTable[EXCEPTION_VECTOR_NUMBER];\r
   EFI_STATUS                    Status;\r
 \r
-  DEBUG ((EFI_D_INFO, "SmmRestoreCpu()\n"));\r
+  DEBUG ((DEBUG_INFO, "SmmRestoreCpu()\n"));\r
 \r
   mSmmS3Flag = TRUE;\r
 \r
@@ -759,7 +759,7 @@ SmmRestoreCpu (
   // See if there is enough context to resume PEI Phase\r
   //\r
   if (mSmmS3ResumeState == NULL) {\r
-    DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));\r
+    DEBUG ((DEBUG_ERROR, "No context to return to PEI Phase\n"));\r
     CpuDeadLoop ();\r
   }\r
 \r
@@ -822,17 +822,17 @@ SmmRestoreCpu (
   //\r
   mRestoreSmmConfigurationInS3 = TRUE;\r
 \r
-  DEBUG (( EFI_D_INFO, "SMM S3 Return CS                = %x\n", SmmS3ResumeState->ReturnCs));\r
-  DEBUG (( EFI_D_INFO, "SMM S3 Return Entry Point       = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r
-  DEBUG (( EFI_D_INFO, "SMM S3 Return Context1          = %x\n", SmmS3ResumeState->ReturnContext1));\r
-  DEBUG (( EFI_D_INFO, "SMM S3 Return Context2          = %x\n", SmmS3ResumeState->ReturnContext2));\r
-  DEBUG (( EFI_D_INFO, "SMM S3 Return Stack Pointer     = %x\n", SmmS3ResumeState->ReturnStackPointer));\r
+  DEBUG (( DEBUG_INFO, "SMM S3 Return CS                = %x\n", SmmS3ResumeState->ReturnCs));\r
+  DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point       = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r
+  DEBUG (( DEBUG_INFO, "SMM S3 Return Context1          = %x\n", SmmS3ResumeState->ReturnContext1));\r
+  DEBUG (( DEBUG_INFO, "SMM S3 Return Context2          = %x\n", SmmS3ResumeState->ReturnContext2));\r
+  DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer     = %x\n", SmmS3ResumeState->ReturnStackPointer));\r
 \r
   //\r
   // If SMM is in 32-bit mode, then use SwitchStack() to resume PEI Phase\r
   //\r
   if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {\r
-    DEBUG ((EFI_D_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));\r
+    DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));\r
 \r
     SwitchStack (\r
       (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->ReturnEntryPoint,\r
@@ -846,7 +846,7 @@ SmmRestoreCpu (
   // If SMM is in 64-bit mode, then use AsmDisablePaging64() to resume PEI Phase\r
   //\r
   if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {\r
-    DEBUG ((EFI_D_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));\r
+    DEBUG ((DEBUG_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));\r
     //\r
     // Disable interrupt of Debug timer, since new IDT table is for IA32 and will not work in long mode.\r
     //\r
@@ -867,7 +867,7 @@ SmmRestoreCpu (
   //\r
   // Can not resume PEI Phase\r
   //\r
-  DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));\r
+  DEBUG ((DEBUG_ERROR, "No context to return to PEI Phase\n"));\r
   CpuDeadLoop ();\r
 }\r
 \r
@@ -904,8 +904,8 @@ InitSmmS3ResumeState (
   } else {\r
     SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);\r
 \r
-    DEBUG ((EFI_D_INFO, "SMM S3 SMRAM Structure = %x\n", SmramDescriptor));\r
-    DEBUG ((EFI_D_INFO, "SMM S3 Structure = %x\n", SmramDescriptor->CpuStart));\r
+    DEBUG ((DEBUG_INFO, "SMM S3 SMRAM Structure = %x\n", SmramDescriptor));\r
+    DEBUG ((DEBUG_INFO, "SMM S3 Structure = %x\n", SmramDescriptor->CpuStart));\r
 \r
     SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;\r
     ZeroMem (SmmS3ResumeState, sizeof (SMM_S3_RESUME_STATE));\r