UefiCpuPkg/PiSmmCpuDxeSmm: remove superfluous ENDs from NASM source

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / CpuS3.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 22c133202ca069df5ea1a3f716b248ca117f7917..4c995ec27068e92d7a4ac19335fe6c929641ba44 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -34,6 +34,11 @@ typedef struct {
   UINTN LongJumpOffset;\r
 } MP_ASSEMBLY_ADDRESS_MAP;\r
 \r
+//\r
+// Spin lock used to serialize MemoryMapped operation\r
+//\r
+SPIN_LOCK                *mMemoryMappedLock = NULL;\r
+\r
 /**\r
   Get starting address and size of the rendezvous entry for APs.\r
   Information for fixing a jump instruction in the code is also returned.\r
@@ -57,7 +62,7 @@ VOID                         *mGdtForAp = NULL;
 VOID                         *mIdtForAp = NULL;\r
 VOID                         *mMachineCheckHandlerForAp = NULL;\r
 MP_MSR_LOCK                  *mMsrSpinLocks = NULL;\r
-UINTN                        mMsrSpinLockCount = MSR_SPIN_LOCK_INIT_NUM;\r
+UINTN                        mMsrSpinLockCount;\r
 UINTN                        mMsrCount = 0;\r
 \r
 /**\r
@@ -76,7 +81,7 @@ GetMsrSpinLockByIndex (
   UINTN     Index;\r
   for (Index = 0; Index < mMsrCount; Index++) {\r
     if (MsrIndex == mMsrSpinLocks[Index].MsrIndex) {\r
-      return &mMsrSpinLocks[Index].SpinLock;\r
+      return mMsrSpinLocks[Index].SpinLock;\r
     }\r
   }\r
   return NULL;\r
@@ -93,30 +98,52 @@ InitMsrSpinLockByIndex (
   IN UINT32      MsrIndex\r
   )\r
 {\r
+  UINTN    MsrSpinLockCount;\r
   UINTN    NewMsrSpinLockCount;\r
+  UINTN    Index;\r
+  UINTN    AddedSize;\r
 \r
   if (mMsrSpinLocks == NULL) {\r
-    mMsrSpinLocks = (MP_MSR_LOCK *) AllocatePool (sizeof (MP_MSR_LOCK) * mMsrSpinLockCount);\r
+    MsrSpinLockCount = mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter;\r
+    mMsrSpinLocks = (MP_MSR_LOCK *) AllocatePool (sizeof (MP_MSR_LOCK) * MsrSpinLockCount);\r
     ASSERT (mMsrSpinLocks != NULL);\r
+    for (Index = 0; Index < MsrSpinLockCount; Index++) {\r
+      mMsrSpinLocks[Index].SpinLock =\r
+       (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreMsr.Msr + Index * mSemaphoreSize);\r
+      mMsrSpinLocks[Index].MsrIndex = (UINT32)-1;\r
+    }\r
+    mMsrSpinLockCount = MsrSpinLockCount;\r
+    mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter = 0;\r
   }\r
   if (GetMsrSpinLockByIndex (MsrIndex) == NULL) {\r
     //\r
     // Initialize spin lock for MSR programming\r
     //\r
     mMsrSpinLocks[mMsrCount].MsrIndex = MsrIndex;\r
-    InitializeSpinLock (&mMsrSpinLocks[mMsrCount].SpinLock);\r
+    InitializeSpinLock (mMsrSpinLocks[mMsrCount].SpinLock);\r
     mMsrCount ++;\r
     if (mMsrCount == mMsrSpinLockCount) {\r
       //\r
       // If MSR spin lock buffer is full, enlarge it\r
       //\r
-      NewMsrSpinLockCount = mMsrSpinLockCount + MSR_SPIN_LOCK_INIT_NUM;\r
+      AddedSize = SIZE_4KB;\r
+      mSmmCpuSemaphores.SemaphoreMsr.Msr =\r
+                        AllocatePages (EFI_SIZE_TO_PAGES(AddedSize));\r
+      ASSERT (mSmmCpuSemaphores.SemaphoreMsr.Msr != NULL);\r
+      NewMsrSpinLockCount = mMsrSpinLockCount + AddedSize / mSemaphoreSize;\r
       mMsrSpinLocks = ReallocatePool (\r
                         sizeof (MP_MSR_LOCK) * mMsrSpinLockCount,\r
                         sizeof (MP_MSR_LOCK) * NewMsrSpinLockCount,\r
                         mMsrSpinLocks\r
                         );\r
+      ASSERT (mMsrSpinLocks != NULL);\r
       mMsrSpinLockCount = NewMsrSpinLockCount;\r
+      for (Index = mMsrCount; Index < mMsrSpinLockCount; Index++) {\r
+        mMsrSpinLocks[Index].SpinLock =\r
+                 (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreMsr.Msr +\r
+                 (Index - mMsrCount)  * mSemaphoreSize);\r
+        mMsrSpinLocks[Index].MsrIndex = (UINT32)-1;\r
+      }\r
     }\r
   }\r
 }\r
@@ -262,6 +289,19 @@ SetProcessorRegister (
       }\r
       break;\r
     //\r
+    // MemoryMapped operations\r
+    //\r
+    case MemoryMapped:\r
+      AcquireSpinLock (mMemoryMappedLock);\r
+      MmioBitFieldWrite32 (\r
+        RegisterTableEntry->Index,\r
+        RegisterTableEntry->ValidBitStart,\r
+        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,\r
+        (UINT32)RegisterTableEntry->Value\r
+        );\r
+      ReleaseSpinLock (mMemoryMappedLock);\r
+      break;\r
+    //\r
     // Enable or disable cache\r
     //\r
     case CacheControl:\r